LPC54606 in QFP100 package and SDRAM

[carstengroen]

The LPC54606 comes (also) in a QFP100 package. It is shown in the datasheet that it supports 8/16 bit EMC interface. It has support for port 0 and port 1 so most of the EMC (for SDRAM) signals are there.

However, the EMC_A[14] are only located on P3.25 which is not available on the 100 pin package. EMC_A[13] and EMC_A[14] are connected to BA0 and BA1 on a 16 bit SDRAM device. Is there some different connections to be used on the 100 pin package, or is it not possible to support 16 bit SDRAM on this package ?

[carstengroen]

Could really use a hint regarding this....

[jeremyzhou · Accepted solution]

Hi Carsten Groen,

The EMC supports 8/16 bit data bus on BGA100 package, you can learn the more information about the SDRAM interface to LPC546xx external memory controller via the application note.

http://www.nxp.com/docs/en/nxp/application-notes/AN12026.pdf 

TIC

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[carstengroen]

Thanks a lot Jeremy!

I was not aware of that application note (I see it went online 2 days before my original question :smileywink:), the text:

explains it perfectly, thanks :smileyhappy: