LPC54605 fro_hf drift (lower than 48MHz) after IEC 61000-4-3 EMC RS test

[manaphy]

I am using the LPC54605J512BD100 processor (LQFP100) with an external 12MHz crystal.

Initially I found the UART communication failed (wrong characters appear) after EMC RS test for 3-5 times (IEC 61000-4-3: RF Electromagnetic Field Immunity Test), the test level is 12V/m. The UART failure cannot recover even we stop the test.

We tried to change the Flexcomm from FC3 to FC5 but not works.

After looking into the failiure in details, we found the baud rate became lower than expect, this is the reason of wrong characters we received.

And then we put the clocks to CLKOUT and measured, we found the fro_hf is 45MHz instead of 48MHz. However the external crystal clock (12MHz) and pll_clk (180MHz) are correct.

Then we tried to change the fcn_fclk source from fro_hf to fro_12m, we guess the problem would be fixed but still not.

We are really confused of this situation.

Question:

1. Why fro_hf is drifted after the RF immunity test?

2. Other solutions to get rid of the baud rate change on UART?

[FelipeGarcia]

Hi,

Could you please share the clocks configuration you are using on your side? Are you using MCUXpresso Config Tools? I highly recommend you to use it as it can configure the clocks in an easy way by using the user interface. Also, please check the following note from user manual, I am not sure if you are already doing this on your side.

Use the PLL to boost the input frequency if a main clock is needed with a frequency higher than the FRO 12 MHz clock and the FRO 96 MHz or 48 MHz clock (fro_hf) is not appropriate. The system PLL must be set up by calling an API (POWER_SetVoltageForFreq API in SDK software package) to deliver the amount of power needed for the CPU operating frequency.

In general the internal clocks are not as accurate as the external clocks, do you face same issue if you feed the Flexcomm clock with external XTAL?

Best regards,

Felipe