LPC43xx sleep mode consumption

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LPC43xx sleep mode consumption

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by ptamo on Fri Nov 07 07:21:32 MST 2014
Hello,

I use the LPC4330 in a custom board. It is clocked at 204Mhz and executing code from internal RAM.
I am trying to reduce power consumption using the sleep mode whenever is possible. I have found that sleep mode reduces the total current consumption only 26mA. I believe that the power consumption reduction must at least 76mA as the datasheet specifies 81mA@204Mhz for the core in active mode and 5mA at sleep.
I use deep sleep mode in some situations were the microcontroller is not used and this mode reduces power consumption 180mA. If I reduce main clock to 102Mhz the consumption is halved, this seems coherent.
I am sure that the microcontroller is entering sleep after the WFI instruction, I use a GPIO to monitor when it enters and leaves it.
All current measurements are done without debugger attached and board power cycled after detaching debugger.

I can't mesure the total current consumption of the LPC alone as there are other peripherals at the board, but its current consumption must be more than 180mA. I find it too much considering that code is being executed from internal RAM. I mesure it inside a while(1){} with interrupts disabled. The only peripherals that are clocked are SSP0, SSP1, UART0 and the external memory controller, the rest of peripheral clocks are disabled.

We use the LPC4357 in another custom board also clocked at 204Mhz. The sleep mode has the same effect. Current consumption is barely reduced.

My main doubts are:
-Is it normal that sleep mode only saves 26mA at 204Mhz?
-Is it normal that the LPC4330 executing a while(1){} from RAM drains more than 180mA?

This unanswered 2013 post seem to describe the same problem:
http://www.lpcware.com/content/forum/lpc43xx-sleep-mode

Thanks in advance
Rubén
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stephencarey
Contributor I

Did this ever get resolved? We too have run a while(1) loop (running from flash) on the Keil MCB4300 development board - and measured the potential across a shunt placed in the Vddreg line (see mcb4300v1-3-schematics.pdf). At 204MHz, we measured currents of ~167mA (98mA at 102MHz). 

However, we are using the LPCXpresso development environment. We’ve also performed similar current measurements on our own custom PCBs.

Is it possible that all the peripherals are actually on, and that we need to explicitly disable them? Do you have an example of your code that achieved the sub-90mA metric (Keil uvision example would be okay)

Thanks

Steve


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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by ptamo on Mon Nov 10 16:09:18 MST 2014
Hi nerd herd,

Thanks for your help, your results are interesting.
The manual says that sleep removes core clock, I do not understand why most of the core power consumption remains. This differs from my experiences in the past. LPC43xx are the first cortex-M I deal with, perhaps is something usual with this architecture.
Sleep mode current at the datasheet is specified  at 12Mhz IRC, so you must be right.

Your 84mA Active mode 204Mhz current measurement is far different from my measurements, this gives me hope.
I have tested another of our boards with the LPC4330, this one from a different batch. I have modified my setup to get more precise current readings. I have tested my setup connecting a load to the LPC power rail (3.3v) to verify that my readings work.
Active mode current @204Mhz inside de while(1){} is 160mA higher than deep-sleep current. Deep-sleep current consumption is very similar to current consumption with the microcontroller at reset, this makes sense.

I understand that ResetISR is the first code executed at the micro. The user manual says that after a power-up the core clock BASE_M4_CLK is connected to the outputof PLL1 and running at 96 MHz and the clock source for the PLL1 is the 12 MHz IRC.
If I place a while(1){} loop at the first line of ResetISR current consumption is ~73mA, a datasheet graph states that at 96Mhz typical current consumption is ~40mA. Note that after a debug power up with the debuger attached BASE_M4_CLK is connected to the IRC an runs at 12Mhz.

Using crystal or IRC makes no significant difference.

I have revised our schematics, comparing them to Keil MCB4300 development boards, looking for differences. I have moved some of the configuration pull resistors to test the jumper settings of the Keil development board. No changes found.
We use LPCOpen v1.02 with some patches added. We have considered migrating our projects to newer v2 versions, but lots of changes are required.
We use LPCXpresso and LPC-link2. Today I have migrated from LPCxpresso v7.1.1 to latest v7.5.0 version to see if it makes any difference on power consumption, no success.
Now I have run out of ideas.

We run both LPC4330 and LPC4357 boards from batteries and power optimization is a must for us.

Thanks for your time
Rubén
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by nerd herd on Fri Nov 07 10:55:00 MST 2014
Hi ptamo,

I did a quick test of the power consumption using an LPC4357 on the Keil MCB4300 development board using Keil uVision 5.12. I am measuring the current going into the chip to give you a better idea of the power savings to expect.

After configuring things to save power, I enter an empty while(1) loop. This is with M0 core in reset state, -O0 optimization, with flash on (this should not matter since the delta between active mode and sleep mode is what matters):

Active mode @ 204Mhz: 84.39 mA (2.9mA delta from the DS value with flash off)
Sleep mode @ 204MHz: 66.38 mA

So it seems the difference between the two are the 20 or so mA you found. As for your comment about 5mA sleep current consumption, I believe that number is at 12MHz IRC.

Active mode @ 12MHz IRC:  9.27 mA (2.7mA delta from DS value with flash off)
Sleep mode @ 12MHz: 7.94 mA

So it seems that yes, sleep mode @ 204MHz saves the amount of power you are seeing, and that no, a while(1) from RAM should not consume 180mA.
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