LPC43xx User Manual (UM10503,Rev 1.2, Dec 2015) issues: I2S-MCLK

[andreasvogel]

LPC43xx User Manual (Rev 1.2, Dec 2015) issues: I2S-MCLK

- chapter 16, page 350ff: all I2Sn_nX_MCLK pins are marked as output only

- chapter 44, page 1212, I2S Transmit Mode Control register: The mode 0x1 is reserved for TX_MCLK

- chapter 44, page 1213, I2S Receive Mode Control register: The mode 0x1 is  valid

- chapter 44, page 1222, table 1021, Transmitter master mode (External MCLK): TX_MCLK is set as input

It seems, that TX_MCLK can be used as input. Can anyone confirm it ? Will there exist a new manual in future ?

[andreasvogel]

testes it on my own -> non functional. So, the diagram/table 1022 (Transmitter master mode (External MCLK)) is wrong.

Going with PLL0Audio with external input will also fail, if MCLK is switched or turned off -> all I2S engines would get no clock from internal.It seems not to be possible to generate BCLK and LRCLK for Tx with external MCLK.

Edit: Rev. 2.1 of UM is from december 2015

Any other ideas ?

[jeremyzhou]

Hi,

Thanks for your sharing.

I will confirmed the question with the AE team, inform you later.

Thanks for your understand.
Have a great day,
Ping

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------