Hello. We are writing a waveform acquisition program using LPC4370 HSADC and GPDMA. We tuned the ADC to a sampling frequency of 80 MHz, applied a DC bias to the inverting input, set up a table of descriptors as follows:
Chip_HSADC_SetupDescEntry(LPC_ADCHS, 0, 0, (HSADC_DESC_CH(0) | HSADC_DESC_MATCH(0x00) | HSADC_DESC_BRANCH_FIRST |
HSADC_DESC_THRESH_NONE | HSADC_DESC_RESET_TIMER));
Chip_HSADC_SetupDescEntry(LPC_ADCHS, 0, 1, (HSADC_DESC_CH(0) | HSADC_DESC_MATCH(0x30) | HSADC_DESC_BRANCH_FIRST |
HSADC_DESC_THRESH_NONE | HSADC_DESC_RESET_TIMER));
Chip_HSADC_SetupDescEntry(LPC_ADCHS, 1, 0, (HSADC_DESC_CH(0) | HSADC_DESC_MATCH(0x00) | HSADC_DESC_HALT |
HSADC_DESC_THRESH_NONE | HSADC_DESC_RESET_TIMER));
Sampling starts on request from the client with the following function:
void scopeStart(void)
{
Chip_HSADC_FlushFIFO(LPC_ADCHS);
Chip_HSADC_SetActiveDescriptor(LPC_ADCHS, 0, 1);
Chip_HSADC_EnablePower(LPC_ADCHS);
DmaHsadcInit();
Chip_HSADC_SWTrigger(LPC_ADCHS);
Board_LED_Set(0, 1);
}
Sampling stops with the following function:
void scopeStop(void)
{
LPC_GPDMA->C0CONFIG |= (1 << 18); //halt further requests
while (LPC_GPDMA->C0CONFIG & (1<<17)) {}; // wait for the current dma transaction to complete
Chip_GPDMA_Stop(LPC_GPDMA, HSADC_DMA_CH);
//switch to halt-descriptor
Chip_HSADC_SetActiveDescriptor(LPC_ADCHS, 1, 0);
Chip_HSADC_DisablePower(LPC_ADCHS);
Board_LED_Set(0, 0);
}
We use the LPC-LINK2 board, to which a 12 MHz sine wave generator with an output resistance of 100 Ohms is connected. The problem is that after the start of sampling, the first 10 samples show a slight increase in amplitude, which then gradually decreases:
When you connect an oscilloscope to the input of LPC-LINK2, you can see the following picture:
It can be seen that immediately after the launch, the ADC has a low input impedance, which causes a jump in the amplitude of the signal upwards with each sample. After a dozen of samples, the picture is normalized.
Please tell us how to fix this problem.
Solved! Go to Solution.
Hi, Vitaliy,
Regarding your question that the external analog signal is distorted when the ADC converter is launched, as you know that the ADC converter includes a Sample/Hold circuit, which is a capacitor, when the ADC is launched, at the sample phase, the external circuit charge the capacitor, because of high conversion rate(80MSPS), the sample time is very short, which behaves like a low impedance, so the analog signal is distorted.
If you sample a periodic signal, I suppose you can truncate a initial samples when you process the data.
Hope it can help you
BR
XiangJun Rong
Hi, Vitaliy,
Regarding your question that the external analog signal is distorted when the ADC converter is launched, as you know that the ADC converter includes a Sample/Hold circuit, which is a capacitor, when the ADC is launched, at the sample phase, the external circuit charge the capacitor, because of high conversion rate(80MSPS), the sample time is very short, which behaves like a low impedance, so the analog signal is distorted.
If you sample a periodic signal, I suppose you can truncate a initial samples when you process the data.
Hope it can help you
BR
XiangJun Rong
Hi, xiangjun.rong
Thanks for your answer. I understand what you mean. Probably, excluding the first 10 samples will be the easiest option.