LPC4370 HSADC clocking issues

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

LPC4370 HSADC clocking issues

1,430 次查看
franz-ottowitte
Contributor II

I just have discovered that the HSADC of the LPC4370 generates a big amount of interference noise when I use the Audio-PLL as clock source. When I use the Main-PLL the noise is completely gone.

Setup:

Audio-PLL running at 460.8 MHz

Main-PLL running at 204MHz

HSADC sample rate is 1536kHz.

Result: Interference noise (~9.6kHz) (synchronous) (1536/160) with a level of  +/- 200 digits = 10% of conversion range!!!

If I run the HSADC with a clock that is derived from the main-pll with a frequency of 1545,45 kHz, the interference noise is gone.

In my application I have to sample a signal quasi synchronously - which is not possible, when I use the main-pll.

Any suggestions what can be done - or is it simple a hw-limitation?

best regards

   -Otto

标签 (2)
0 项奖励
回复
3 回复数

1,169 次查看
soledad
NXP Employee
NXP Employee

Hi,

Maybe it is a configuration issue, please check the following thread, this may helps.

LPC4370 ACDHS speed | www.LPCware.com 

Have a great day,
Sol

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 项奖励
回复

1,169 次查看
franz-ottowitte
Contributor II

USB clock must be multiple of 48MHz as I am using USB. That's a no-go.

My question was - is the HSADC not usable if the supplied clock is not a direct divsor the the main-pll clock due to interference noise? 
If this is the case - at least a note in the UM should be given.

0 项奖励
回复

1,169 次查看
hairy_lee
Contributor II

Have you tried using the USB PLL?

0 项奖励
回复