LPC4337 10bits ADC to sample audio at 22ksps

[josemotta]

Hello everyone, I'm on a current embedded audio project using LPC4337.

I need to sample a voice audio signal (low fi), then filter it with noise cancelling algorithm and finally store it into an SD card and push it to the DAC for online monitoring.

How can I configure its ADC sampling time to achieve 22ksps? I'm not sure if I have to use a timer or I can directly set up ADC sampling time with Chip_ADC_SetSampleRate function.

Use Manual says:

Table 1114.   A/D Control register (CR)

Bits15:8 /// CLKDIV

The ADC clock is divided by the CLKDIV value plus one to produce the clock
for the A/D converter, which should be less than or equal to 4.5 MHz. Typically,
software should program the smallest value in this field that yields a clock of
4.5 MHz or slightly less, but in certain cases

So, in order to achieve 22000sps is it OK to use the following function on the ADC driver code?

/**
* @brief Set the ADC Sample rate
* @param pADC : The base of ADC peripheral on the chip
* @param ADCSetup : ADC setup structure to be modified
* @param rate : Sample rate, should be set so the clock for A/D converter is less than or equal to 4.5MHz.
* @return Nothing
*/
void Chip_ADC_SetSampleRate(LPC_ADC_T *pADC, ADC_CLOCK_SETUP_T *ADCSetup, uint32_t rate)
{
uint8_t div;
uint32_t cr;

cr = pADC->CR & (~ADC_SAMPLE_RATE_CONFIG_MASK);
ADCSetup->adcRate = rate;
div = getClkDiv(pADC, ADCSetup->burstMode, rate, (11 - ADCSetup->bitsAccuracy));
cr |= ADC_CR_CLKDIV(div);
cr |= ADC_CR_BITACC(ADCSetup->bitsAccuracy);
pADC->CR = cr;
}

I'm asking this because I'm unable to get the right sampling time when changing the rate parameter on Chip_ADC_SetSampleRate function.

It seems that I have to choose a value of 400000 which will drive an ADC clock close to 4.5MHz. If that's the case, how can I obtain a desired sampling rate, such as 22000Hz or even lower?

Thanks in advance for your kind responses.

Regards

Jose

Original Attachment has been moved to: main.c.zip

[kerryzhou]

Hello Jose Motta,

      Sorry for our later reply because of overloaded cases, and thank you for your patient!

      About the sample rate, from the datasheet

You can find the max rate is 400K, so your 22Ksps must can be achieved.

As you know, 10 bit ADC resolution, need 11 clock cycles, actually, the detail sample time is determined by your adc clock cycles, I don't know what the adc clock you are using now.

You can get your adc clock then 11* adc clock time is your real sample time.

You don't need to keep the sample time =22ksps, actually, you just need to keep the sample time is higher than 22ksps. this is just make sure your adc data can be successfully convert.

For the detail sample rate, normally, from the Nyquist's law,  in practical usage, you need to keep the sample time 5-10 times than then wave frequency which you want to convert.

So, you can associate with the TIMER to trigger the ADC convert, then to realize the detail sample rate which you want. Timer sample rate is just to keep the adc sample point is which you want, the ADC sample time in the datasheet, you can consider it as the convert time, the time keep the adc successfully converted.

Wish it helps you!

If you still have question, just let me know!

Have a great day,

Kerry

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