Hi Maggie,
Flash Accelerator Configuration for flash bank A register (FLASHCFGA, address 0x4004 3120);
Flash Accelerator Configuration for flash bank B register (FLASHCFGB, address 0x4004 3124).
Following reset, flash accelerator functions are enabled and flash access timing is set to a default value of 16 clocks.
If customer want to modify the [FLASHTIM] value of FLASHCFGA/B register, please refer below code:
LPC_CREG->FLASHCFGA = (0xF << 12) | (0x1 << 31);
LPC_CREG->FLASHCFGB = (0xF << 12) | (0x1 << 31);
Have a great day,
Ma Hui
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------