Your fully right, the numbers provided in the documentation don't really fit together.
As a matter of fact we specify the maximum EMC frequency for 120MHz. For some doc rule reasons we need to provide a time value in the tables, which always results in the problem that the frequency can't be exactly hit due to rounding. In this case it would have been better to specify the cycle time as 8.3ns and not as 8.4ns.
I will provide this as input to the product group and hope that it gets corrected.
Regards,
NXP Support Team