LPC4078 LQFP100: GPIO p0.28 not working

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LPC4078 LQFP100: GPIO p0.28 not working

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by gjwep on Fri Nov 06 10:00:27 MST 2015
Hello,

I am trying to configure P0.27 and P0.28 as output ports on a LPC4078 LQFP100 (custom board). Per UM these two are "Type I IOCON registers" which inherit some behavior from the I2C functions available on them. I configured P0.27 according to UM table 88 and can change its pin state as expected. However, P0.28 doesn't want to play and neither SETing it through code nor changing it manually in the debugger affects the PIN state of 0 (verified with voltmeter). There is no external pull-down attached to the pin. Behavior confirmed with a second board of the same build (LPC4078 LQFP100).

Initializations and toggling of pin state shown for both P0.27 (which works) and P0.28 (which doesn't):

...
Chip_GPIO_Init(LPC_GPIO);
Chip_IOCON_Init(LPC_IOCON);

//p0.27
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 27, (IOCON_FUNC0));       
Chip_GPIO_SetPinDIR(LPC_GPIO, 0, 27, true);
Chip_GPIO_SetPinOutLow(LPC_GPIO, 0, 27);      //stays low (default)
Chip_GPIO_SetPinOutHigh(LPC_GPIO, 0, 27);     //switches to high OK

//p0.28
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 28, (IOCON_FUNC0)); 
Chip_GPIO_SetPinDIR(LPC_GPIO, 0, 28, true);
Chip_GPIO_SetPinOutLow(LPC_GPIO, 0, 28);      //stays low (default)
Chip_GPIO_SetPinOutHigh(LPC_GPIO, 0, 28);     //STAYS LOW
...


What am I missing?

Thanks in advance,
gj
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by gjwep on Sat Jan 09 11:45:35 MST 2016
TKoe,
Long ago but thanks anyway. This indeed works fine with external PU. I agree that table 89 would require a hint...
gj
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by TKoe on Fri Dec 04 10:01:15 MST 2015

Quote:
the same thing works fine on a LPC4088 QSB



Interesting, because according to the UM chapters 22.1 (I²C -> Basic Configuration) and also 7.3.8 (IO config -> IOCON registers -> I2C modes) neither of those pins should be able to output a high level without an external pull-up resistor.

Why this isn't mentioned (or at least referenced) in table 89 is beyond me though.



Edit: I apparently also love responding to dead threads. My excuse is that it was already on top of the thread list :P
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by gjwep on Fri Nov 06 10:26:24 MST 2015
I should have added that the same thing works fine on a LPC4088 QSB (which uses a different package LPC408x).
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