I am using a LPC1769 µc with DMA on UART1 TX and RX. This works well, but in a new setup I need to detect the end of a TX transfer in order to start a new transfer, but only if the old transfer (with varying transfer lenghts) is finished.
What would be the best way to solve this? Which register would have to be checked for this?
thank you for your reply.
Are you referring to the Transmit Holding Register Empty (THRE) interrupt? As mentioned in other topics, it might me the better option to user a timer or similar workaround?
I think you can first test the Interrupt method, and there is UART-Interrupt demo
under LPCopen, download from:
If doesn't satisfied your requirement, then further improvement .