LPC1549 I2C master never pending after transfer start

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LPC1549 I2C master never pending after transfer start

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donald_rosendah
Contributor I

I am trying to get I2C master working on an LPC1549JBD100. When executing Chip_I2CM_XferBlocking the process hangs on (!Chip_I2CM_IsMasterPending(pI2C)). The code is based on the periph_i2cm_polling example from LPCopen v2.20.

I have verified that I can control the pins when configured as PIO0_22 and PIO0_23. When configured as SDA and SCL I see some clock signals during/after initialization, but never when the actual data should be transmit.

The SDA and SCL lines are connected to a logic analyzer, both when testing on the LPCXpresso1549 and on the custom hardware. Differences are that the evaluation board uses the LPC1549JBD64 while the custom hardware uses an LPC1549JBD100. Another difference is that the custom hardware uses external pull-ups to 5V while the evaluation board uses external pull-ups to 3.3V.

What could be the cause of the I2C master never transmitting and returning to pending state? If more information is required, please let me know and I will post it as soon as possible.

Best regards,

Donald Rosendahl

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Donald Rosendahl,

    Do you check the I2C bus wave, when you send the I2C data, whether the I2C bus have the data, whether your I2C slave give the ACK to i2c master?

    You can give me some I2C bus wave, if the slave didn't ACK, the code will stop at your point.

    About the 3.3v and 5V problems. I think this may have problems. The standard IO is 5V tolerant pins except PIO0_12.

pastedImage_1.png

So, please check your input voltage with oscilloscope, is it over 5V?

Please also check your slave I2C, if the master give 3.3V to slave, can it recognize it as high?

This is very important.

Normally, you can use the convert module to make the I2C signal at the same requirement, don't mix 5V and 3.3V signal together.

    


Have a great day,
Kerry

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donald_rosendah
Contributor I

Hello Kerry,

Thank you for your response. I have been performing some more tests and I think I have found the reason for the misbehaving I2C peripheral. Shortly before the test message was send, the board power is initialized. This includes enabling the 5V power supply that is used to pull-up the I2C bus. After adding a 5ms delay between the 5V enable and the transmission on the I2C bus, the peripheral now correctly returns to master pending state (see attached image for 5V enable characteristics).

Regarding the 5V pin tolerance: I do not think this will be an issue. You mention that pin PIO0_12 is not 5V tolerant, but only PIO0_22 and PIO0_23 are used for I2C on 5V. The SCL and SDA lines are externally pulled-up so that a slave will receive correct line levels.

Best regards,

DonaldI2C_wave.PNG

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Donald,

   Thank you for your updated information.

   The I2C wave really helps to analysis the problem.

   So, your problem still in the power stable area, normally, after power on, before do the detail function, it's better to add some delay, just make sure the power is stable.  If you are using PIO0_22 and PIO0_23 as the 5V tolerance pin, you can use it.

   If you still have question about it, please kindly let me know.

 


Have a great day,
Kerry

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