LPC11U35FHI33/501 Are there any requirements and restrictions on chip drop test?

[Albert88]

After the lpc11u35fhi33 / 501 chip was put on the machine, a drop test was conducted. It was found that 2% of the products had poor functions and the wafer binding wire inside the chip was broken. Are there any requirements and restrictions for the drop test of this chip? Is the break of the internal wafer binding wire related to the drop test?

[xiangjun_rong]

Hi,

Regarding your question that "2% of the products had poor functions and the wafer binding wire inside the chip was broken", can you clarify the test you have done? do you populate the chip on board, power up, test the expected function, but the chip runs abnormally?

How do you know the wafer binding wire inside the chip was broken? does you have a failure analysis?

BR

XiangJun Rong

[Albert88]

[Albert88]

The chip runs abnormally, and then the X-ray inspection and the cover opening inspection find that the internal binding wire of the chip is broken.  Please help to find out the cause of the internal binding wire of the chip. We will further check it. Thank you.

[xiangjun_rong]

Hi, Albert,

We are technical support, we can not help you.

for your issue, pls contact local FAE and do failure analysis for the LPC11U35FHI33/501.

BR

XiangJun Rong

[Albert88]

In addition, is there any requirement and restriction for this chip to perform drop test? How high can I drop and how many times can I drop?

[Albert88]

Hi Rong, we just want to know first that apart from the reasons of the original production, will the internal wafer binding wire break due to the high voltage and current during the chip collision or product operation? We choose another direction to find the cause of fracture

[xiangjun_rong]

Hi,

As I have said we are application engineer, failure analysis is beyond our knowledge scope.

I suggest you contact NXP FAE so that they can help to do failure analysis.

BR

XiangJun Rong