LPC11Cxx CANopen CAN register settings - where to find documentation about CAN_BTR?

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LPC11Cxx CANopen CAN register settings - where to find documentation about CAN_BTR?

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by broth on Wed Jul 22 06:06:24 MST 2015
Hello!

I am using a NXP LPC11Cxx controller with onchip ROM drivers for CANopen.
The example driver canopen_driver.c from NXP does not come with a description of that strange CAN_BTR register.

I would like to know where to find documentation about how this register is encoded, specifically which bit positon has which meaning.

I know that the specific CAN parameters like BRP, SJW etc... has to be put there but without knowing the positions thats impossible.

Please don't point me to the documentation of Bosch or links to other forum entries as these might expire and not valid anymore.

Thanks for your help!

Best regards,

Bernhard

PS: If no documentation is available, please tell the correct settings for 100kbps, 250kbps and 500kbps @ 48MHz clock.
As setting gfor 1000kbps I am using currently CANCLKDIV = 0, CAN_BTR = 0x00002BC2
Sample point is 87,5%

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by LabRat on Wed Jul 22 11:45:39 MST 2015

Quote: CVAS
Maybe, before to "contact NXP technical support" you can try  to use SEARCH button 

For example  if you  type : CAN baude rate  => https://www.lpcware.com/content/forum/lpc11cxx-can-baud-rate-calculation



BTW: this link is included in https://www.lpcware.com/content/forum/11c24-can-speed...

But obviously that's not the kind of help OP is expecting...
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by CVAS on Wed Jul 22 11:24:10 MST 2015
Maybe, before to "contact NXP technical support" you can try  to use SEARCH button 

For example  if you  type : CAN baude rate  => https://www.lpcware.com/content/forum/lpc11cxx-can-baud-rate-calculation
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by broth on Wed Jul 22 07:29:41 MST 2015
No, this link does not explain that.
I must get something wrong but instead of pointing me into the right direction you prefer to send me around in circles.

So I will go and contact NXP technical support directly, I do not expect to get any more help here.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by R2D2 on Wed Jul 22 07:23:13 MST 2015

Quote: broth
All right, I'll ask another question:

How you came to following result (your post in https://www.lpcware.com/content/forum/11c24-can-speed):



Isn't the link in #1 of that thread is explaining that  :~
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by broth on Wed Jul 22 07:18:44 MST 2015
All right, I'll ask another question:

How you came to following result (your post in https://www.lpcware.com/content/forum/11c24-can-speed):


Quote:
//Initialize CAN Controller 48MHz-1000kbps
uint32_t ClkInitTable[2] = {
0x00000000UL, //CANCLCLKDIV -> div: 0
0x00002BC2UL, //CAN_BTR     -> BRP: 3, Quanta: 16, Seg1: 12, Seg2: 3, SJW: 3, Sample 81%
};

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by R2D2 on Wed Jul 22 07:13:26 MST 2015

Quote: broth
Would you be so kind and explain?



Explain what  :~

This bits and bytes thing  :quest:
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by broth on Wed Jul 22 07:12:33 MST 2015
Would you be so kind and explain please?

0x2BC2
is in binary

Bit15.......................................Bit 0

0   0   1   0    1   0   1   1     1   1   0   0    0   0   1   0

BRP is bit 5:0 so 0b000010 = 2
SJW is bit 7:6 so 0b11 = 3
T1 is bit 11:8 so 0b1011 = 11 (sorry got that wrong above!)
T2 is bit 14:12 so 0b010 = 2 (sorry got that wrong above!)

CANCLKDIV is set to 0

This gives a working 1000kbit/s CAN interface

like you posted on

https://www.lpcware.com/content/forum/11c24-can-speed

I'd like to know what's wrong or how the values are correctly encoded.
If not, please share the correct values for 100, 250 and 500 kbit/s @ 48MHz
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by R2D2 on Wed Jul 22 07:01:48 MST 2015

Quote: broth

Decoding the value this gives

CANCLKDIV 0
BRP 2
SJW 3
T1 7
T2 5



That's nonsense  :((
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by broth on Wed Jul 22 06:51:17 MST 2015
Thank you!

Rant: The driver describes a register names "CAN_BTR" and this appears in the UM10398 document in 17.4.2
No hint is shown that this register shall be the same as CANBT in 16.6.1.4

So in my case CPU running @ 48MHz, CAN_BTR register is 0x00002BC2 -> CAN baud rate = 1000kbps (confirmed using 3rd party CAN receiver on linux PC), sample point 87,5%

Decoding the value this gives

CANCLKDIV 0
BRP 2
SJW 3
T1 7
T2 5

Can this be valid?
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by R2D2 on Wed Jul 22 06:27:45 MST 2015

Quote: broth
The example driver canopen_driver.c from NXP does not come with a description of that strange CAN_BTR register.

I would like to know where to find documentation about how this register is encoded, specifically which bit positon has which meaning.



:quest:

User manual UM10398 Chapter 16.6.1.4 CAN bit timing register:

Quote:
16.6.1.4 CAN bit timing register

Table 249. CAN bit timing register (CANBT, address 0x4005 000C) bit description
Bit      Symbol    Description
5:0     BRP         Baud rate prescaler
7:6     SJW         (Re)synchronization jump width
11:8   TSEG1     Time segment before the sample point including
14:12 TSEG2     Time segment after the sample point


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