Thanks for the swift response Xiangjun.
Regarding 1st recommendation of ensuring to disable the interrupts before making any IAP call; I am currently doing this; please see the implementation below:
IAP iap_entry;
iap_entry = (IAP)IAP_LOCATION;
uint32_t IAP_Command[5] = {0, 0, 0, 0, 0};
uint32_t IAP_Result[4] = {0, 0, 0, 0};
IAPCommands iap_command_to_execute = PREPARE_SECTOR_FOR_WRITE_OPERATION;
IAP_Command[0] = iap_command_to_execute;
IAP_Command[1] = SECTOR;
IAP_Command[2] = SECTOR;
__disable_irq();
iap_entry(IAP_Command, IAP_Result);
__enable_irq();
if(IAP_Result[0] != CMD_SUCCESS)
{
return FALSE;
}
iap_command_to_execute = COPY_RAM_TO_FLASH;
IAP_Command[0] = iap_command_to_execute;
IAP_Command[1] = (uint32_t)(SECTOR_ADDR + (BLOCK_NUM * FLASH_BUFFER_SIZE)); //(Offset % 256)
IAP_Command[2] = (uint32_t)buffer;
IAP_Command[3] = FLASH_BUFFER_SIZE;
IAP_Command[4] = CPU_CLK;
__disable_irq();
iap_entry(IAP_Command, IAP_Result);
__enable_irq();
if(IAP_Result[0] != CMD_SUCCESS)
{
return FALSE;
}
iap_command_to_execute = COMPARE;
IAP_Command[0] = iap_command_to_execute;
IAP_Command[1] = (uint32_t)(SECTOR_ADDR + (BLOCK_NUM * FLASH_BUFFER_SIZE));
IAP_Command[2] = (uint32_t)buffer;
IAP_Command[3] = FLASH_BUFFER_SIZE;
__disable_irq();
iap_entry(IAP_Command, IAP_Result);
__enable_irq();
if(IAP_Result[0] != CMD_SUCCESS)
{
return FALSE;
}
However, I have not tried the 2nd recommendation of ensuring both the interrupt vectors and the interrupt handlers are active in RAM. could you please shed some light as to how this may be verified, or accomplished? In IAR Workbench IDE, as I step through code I can see control executes from RAM addresses, but right after I erase sector 0 or 1 i can see control just navigate to some empty address which consequentially its when hard fault occurs.
Thank you.