Can someone at NXP please help me fill out this table? I'm trying to port my EEPROM emulation algorithm to support several LPC chips, and they seem to behave differently, even within the LPC8xx series.
Also please point me to the documentation of this if it exists.
LPCxx flash characteristics (erased state, erase/prog size, endurance, etc)
| MCU Family | Flash erased state as read | Prog size min / max | Erase size min / max | Prog/erase endurance min | |
| LPC802 | | | | | |
| LPC804 | 0x00 | 64B / 1024B | 64B / 1024B | 200,000 | |
| LPC81x | | | | | |
| LPC82x | | | | | |
| LPC83x | | | | | |
| LPC84x | 0xFF | 64B / 1024B | 64B / 1024B | 10,000 | |
| others... | | | | | |
I found a note on LPC55xx that said that you shouldn't even be able to read erased (unprogrammed) flash (hard-fault!). Is this also true for LPC8x? https://community.nxp.com/t5/LPC-Microcontrollers-Knowledge/LPC55xx-Erased-Memory-State-0-or-1/ta-p/...
BTW, I've already found out that I can't write to the flash in units smaller than 64B page on LPC804: https://community.nxp.com/t5/LPC-Microcontrollers/LPC804-write-flash-single-word/m-p/1400358
A follow-up question: Based on my observations with LPC804, it seems that it is unnecessary to call "Erase page" before call "Copy RAM to flash" since the latter seems to erase the page before programming anyway. Is it recommended or would it count to unnecessary Prog/Erase cycles? Is this true for all LPC variants, or just LPC804?