LPC 4370 HSADC signal rectified, a delay of 300 mu secs per aline after interrupt

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LPC 4370 HSADC signal rectified, a delay of 300 mu secs per aline after interrupt

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vxs187
Contributor III

Hi, 

I am using an LPC 4370 to make an interrupt driven data acquisition through HSADC, gets data through DMA. I found two things happening, there is about a 280 mu second delay per acquisition, also there is a rectification that happens to the signal, only the lower part of the signal is found in the acquired samples. I am yet to find the reason why. If someone could help me with this, it would be great. I am throwing data to an RPi through SPI protocol. 

Thanks! 

Regards, 

Vish

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Visweshwar,

Can you explain what the 280us delay is?

BR

XiangJun Rong

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vxs187
Contributor III

Hi Rong, 

When the MCU receives an interrupt, it's supposed to acquire the samples immediately, if I am not mistaken. This does not happen. There is a 280-microsecond delay. There is also half-wave rectification in the acquired samples if you can try running and displaying it. I don't know why this happens. 

Regards, 

Vish

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Visweshwar Srinivasan,

As you know that the interrupt pin is designed to connect to a hardware button in general, when user press a button, an interrupt is triggered. The hardware button is a mechanical component, the button logic signal will have bouncing/stable/bouncing waveform, so the interrupt circuit is designed to have a long delay to wait for the signal stable. So it is okay to have 280ms delay for the pin interrupt.

Regarding your second question, as you know that there is a Sample/Hold(S/H) circuit, which is a capacitor, in SAMPLE phase, external circuit charges the capacitor, in HOLD phase, the capacitor voltage keeps it's value, so analog channel input impedance varies with SAMPLE phase and HOLD phase, because the high speed ADC sampling frequency is very very high, the sample time is very short, the impedance in sample phase is very low, the analog channel variable input impedance can lead to the signal distortion because the external signal can not be treated as a voltage source.

I suggest you use an analog buffer based on operation amplifier to reduce the signal impedance.

Hope it can help you

BR

Xiangjun Rong

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