Content originally posted in LPCWare by stanley76726 on Fri Oct 19 20:59:49 MST 2012
Hello!
For checking whether the SPI bus on LPC4357 is available, I am trying to use SSP0 as a master and SSP1 as a slave on the same board (MCB4300).
At first, I ran the Ssp_Master sample and check the waveforms (SCK, SSEL, and MOSI) from a oscilloscope, it seemed to work as expected.
But since I am unsure whether the MISO/MOSI can receive data correctly and have only one board, I want to built a SPI master/slave bus on one board, as titled.
Therefore, I combined both Ssp_Master and Ssp_Slave samples into a progrom.
My problem is that:
When I was debugging using Keil uVision4, the SSP Data Register (SSPx->DR) was wrote to some wrong values. Take Ssp_Master as an example, when it went in SSP_ReadWrite() -> SSP_SendData(), the value of SSPx->DR was set to 0x80 or 0xFF, not 0x01~0x3F as I expected. On the other hand, the SSP Status Register SSPx->SR was always 0x00000003 (meant to Transmit FIFO Empty(TFE) and Transmit FIFO Not Full(TNF)), SSPx->SR should be written to 0x00000000 or 0x00000002 when the FIFO is full or is sent 1-7 data frame(s), isn't it?
Anyone have already run Ssp_Master/Ssp_Slave sampels on LPC43xx boards, or had similar experience? Share with me please!
