ISP mode troubles with NGX LPC1857-Xplorer++ board

[lpcware]

Content originally posted in LPCWare by inflames on Mon Dec 16 03:29:43 MST 2013
Hi all,

I have a big problem with a NGX LPC1857-Xplorer++ board.

I can't get debug access to the MCU using my Segger J-Link debugger (it works fine with others boards, Embedded Artists LPC4357 eval board, for example).

NXP says that the classic cases of this could be the following:
- The image contains code that sets the MCU clocks up "incorrectly".
- The image contains code that enables a watchdog timer.
- The image contains code that "switches off" some, or all of the multiplexed debug pins (JTAG/SWD).

The first thing to try with NXP LPC MCU's to recover debug access is to boot into the ISP bootloader.

I have to put P2_7 (H14, EMC_A9) low during a power-up in order to run ISP mode, but according to the datasheet the aforementioned pin is not available on the headers neither on a button.

Is there any reason for that?
Is there any other way to get ISP access with this board? I can't enter ISP mode with DFU utils or FLASHMAGIC tool (using UART3).

Best regards

[lpcware]

Content originally posted in LPCWare by mc on Thu Dec 19 10:59:46 MST 2013
Hi inflames,
Please check with NGX about P2_7 access. This ISP pin is always there in the devices,however not accessible in the board.

[lpcware]

Content originally posted in LPCWare by cfb on Thu Dec 19 04:25:10 MST 2013

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Quote: inflames
The first thing to try with NXP LPC MCU's to recover debug access is to boot into the ISP bootloader.

I have to put P2_7 (H14, EMC_A9) low during a power-up in order to run ISP mode, but according to the datasheet the aforementioned pin is not available on the headers neither on a button.

Is there any reason for that?

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P2_7??? Read Chapter 4 "LPC18xx Boot ROM" of the LPC18xx User Manual UM10430 (not the datasheet). Booting is configured using the 4-pole DIP switch on the board. This corresponds to the settings described in Table 12. Refer to the Boot Select switch of the NGX LPC1857 schematic to see how the switch is wired up and what configuration is required to boot from the Quad SPI flash.

[lpcware]

Content originally posted in LPCWare by Nitin_Bhaskar on Thu Dec 19 01:24:03 MST 2013
Hi,
  
     If you look into the schematics LPC1857 Xplorer++ LCD baseboard you can find a switch with name "ISP". Not sure whether this pin can help. I have a LPC4357 Xplorer++ and i could download the code using DFU util by changing the DIP switch configuration on the board.

-Nitin

[lpcware]

Content originally posted in LPCWare by inflames on Tue Dec 17 14:30:36 MST 2013
I also tried to enable "vector catch" using the LPC-link2 as explained here

http://www.lpcware.com/content/faq/lpcxpresso/regaining-debug-access

but I have the same problem: "02: Failed on connect: Ep(04). Cannot halt processor.