Dear Team,
We are encountering an intermittent crash issue with firmware running in SDRAM on our i.MX RT1170 platform. To diagnose the problem, we replicated the firmware execution on an i.MX RT1170 Evaluation Kit (MIMXRT1170-EVKB).
The observed behavior is a random microcontroller reset, preventing us from capturing any diagnostic information via Trace32. Interestingly, when we enable the M4 clock (despite the target device being an i.MX RT1171, which does not have an M4 core), the crash no longer occurs.
This leads us to the question: Is there a plausible explanation for how enabling the M4 clock could influence the stability of firmware running on the A7 core, even on a device where the M4 core is not physically present? We are seeking potential reasons for this behavior.
Thank you for your assistance in investigating this issue.
Best regards,
Hi @Nexus76 ,
Thanks for your interest in NXP MIMXRT series!
Since the post was not in the appropriate section, it has only now come to our attention. We apologize for the delay.
Additionally, I have noticed that our colleagues are supporting you in this thread: https://community.nxp.com/t5/LPC-Microcontrollers/Cortex-M7-IMXRT1171-crash/td-p/2050761
Please stay in sync in this thread, and do not hesitate to let us know if you have any new questions.
Best regards,
Gavin