I2C configuration in LPC845

[DHARSAN]

Hello, 

        I'm currently working in the LPC 845 microcontroller in I2c. i have tried the calculation for the CLKDIV register with the formula

Baudrate= I2C frequency/(SCLHIGH+SCLLOW)

For example;

100 KHz=30Mhz/(SCLHIGH+SCLLOW)

which gives the (SCLHIGH+SCLLOW)=300 & individual SCL will be 150 

when substituting with the SCL= (CLKDIV+1)*(MSTSCLHIGH+2)

where MSTSCLHIGH =1,;

when finding the CLKDIV, which gives the CLKDIV = 49.

I have compared and substituted with the calculation which derived SDK example it does not match up and couldn't get the exact value for CLKDIV when configuring with I2C while debugging for 100KHz the value will be 0x18. 

How the calculation will be. Kindly explain it briefly.

With Regards

Dharsan K K

[xiangjun_rong]

Hi,

As the following screenshot,

SCL rate = I2C function clock rate / (SCL high time + SCL low time) = I2C function clock rate / ((CLKDIV + 1) * (MSTSCLHIGH + 2+MSTSCLLOW + 2))).

The CLKDIV is the value in I2C->CLKDIV reg

The MSTSCLHIGH is the value in MSTSCLHIGH bits in I2C->MSTTIME reg

The MSTSCLLOW is the value in MSTSCLLOW bits in  I2C->MSTTIME reg

In table 369, The I2C function clock rate is 30mhz

CLKDIV value is 14, MSTSCLHIGH bits is 0, MSTSCLLOW is 1.

SCL rate = I2C function clock rate /((CLKDIV + 1) * (MSTSCLHIGH + 2+MSTSCLLOW + 2)))

=30MHz/((14+1)*(0+2+1+2))=30MHz/(15*5)=400KHz

Hope it can help you

BR

XiangJun Rong

[DHARSAN]

Also while debugging the SDK example with the configuration of 400KHz(Clock=30MHz), we got the value for the registers

CLKDIV=0x03

MSTTIME=0x77

Kindly resolve or give a solution for the issue.

[xiangjun_rong]

Hi,

With the configuration:

case 1:

30mHz I2C clock:

CLKDIV=0x03

MSTTIME=0x77

The I2C baudrate is 30Mhz/((3+1)(7+2+7+2))=416Khz.

case 2:

If you want to get 100KHz I2C baud rate, you can select the parameter:

CLKDIV=15,

MSTTIME=0x77;

The I2C baudrate is 30Mhz/((15+1)(7+2+7+2))=104KHz.

Hope it can help you

BR

Xiangjun Rong

[DHARSAN · Accepted solution]

The DIVVAL of CLKDIV value for 30MHz is 14 has only given for the 400 KHz frequency, when calculating for 100 KHz there is no DIVVAL mentioned then how the calculation will be?