Hi Frank,
Thanks for the reply,
First, external RAM is driven by peripherals and IO lines, which means you need to set this peripheral and lines up before using them. For static use with the linker (and linker script), you need to modify the startup code to initialize it before RAM data are copied.
We are already using the SDRAM and assigning the specific data using __DATA(RAM8) attribute. But now we are planning to use it for entire application code execution.
Regarding the Startup code and linker script implementation, is there any application note with respect to MCU xpresso will be helpful.
Second, you will need those interface lines, especially address and data lines. Are those free in your current design ? And does your derivate support expernal RAM at all ?
We already have interfaced the SDRAM as mentioned above but regarding the device support to use SDRAM as a external RAM instead of on chip RAM , is not yet clear since not able to find as such information regarding the same.
Third, external RAM is usually only 16 bit wide. This shouldn't be a problem for you though.
Yes it is 16bit wide.
Fourth, you might want to check if code execution from ext. RAM is possible (if you need it). This requires an internal connection to the I-bus.
Yes we are looking for the same purpose, but not clear regarding the internal connection to I-Bus.
And finally, you might check which core can access which address spaces. At least the M4 core can use it. This will define what purpose you can use it for
M4 Core and M0App core any one at a time can access the SDRAM. My actual purpose is to evaluate whether we can use external RAM for M4 Core and on chip RAM for M0App core?
please suggest the input for the same. also let me know if you required further more details.
BR,
Gaurav More