Dear Kerry,
We your suggestion this morning and did not get the desired results. Let me explain in more detail.
· We are using the LPC4357FET256 ARM Cortex-M4/M0|32-bit MCU|NXP with the SDRAM from Samsung 256 Mb N-die model K4S561632N-LI75
· The baseline case is the board drawing 10.5 mA with the processor in deep power down mode.
· Following your instructions (i.e., setting the EMC control register bit0 to 0), we observed no change in the power draw.
· To understand which component was consuming this power, we physically removed the SDRAM from the board, resulting in the power draw being reduced to 2.5 mA.
· So, we concluded that SDRAM is drawing ~8 mA when the processor is in deep power down mode.
· We scoped the lines going to the SDRAM and confirmed that there is no clock signal going to the SDRAM when the processor is in deep power down mode.
Therefore:
· Our question is how can we reduce the SDRAM power consumption to values consistent with its datasheet specification (see Table 11 on page 8 of http://www.samsung.com/global/business/semiconductor/file/2011/product/2010/5/24/425848ds_k4s561632n....
Thanks in advance for your help!
Bill