GNU GCC Compatible CMSIS support for LPC1756 registers

[lpcware]

Content originally posted in LPCWare by LevitonDave on Mon May 02 15:48:43 MST 2016
Is there any GCC compatible register definition files available for the LPC1756.
I am having to port an IAR project to an Eclipse GCC project and was looking to avoid redefining all the registers for the LPC1756 to be compatible with the CMSIS libraries.

Key interfaces are CAN, ADC, Timers and GPIO.

Thanks in advance,
LevitonDave

[lpcware]

bump

[lpcware]

Content originally posted in LPCWare by lpcxpresso-support on Tue May 03 10:18:23 MST 2016

The LPCXpresso IDE itself is Eclipse/GCC, and distributes compatible headers. You'll find legacy CMSIS_CORE for the LPC17xx parts. We consider CMSIS_CORE as legacy since our example code is primarily based on LPCOpen which you can find on this website.

Thanks and regards,
LPCXpresso Support

[lpcware]

Content originally posted in LPCWare by LevitonDave on Tue May 03 08:55:13 MST 2016
Thanks for the information.
Unfortunately, the issue is not the core CMSIS but the custom registers that are supported for the LPC1756 and are available for the custom IDE environments (Keil, IAR, etc.).

What I was looking for was the custom registers for the peripherals being defined without having to create them all myself.

The standard files only define the timers as an example (in Eclipse/GCC the file DEVICE.h needs to be replaced with custom definitions for the peripherals). I was looking for support from NXP on having these available without plagiarizing IAR or other copyrighted implementations.

I can do it but was hoping to save the time needed to create my own.

LevitonDave

[lpcware]

Content originally posted in LPCWare by vtw.433e on Tue May 03 01:14:46 MST 2016
CMSIS header files are compiler neutral. That is, where there is a difference in compilers, the header file uses conditional compilation. So a single CMSIS header file supports GCC, IAR and Keil etc.

Looking at the LPC17xx.h header file, it has virtually no conditional compilation. Instead, it uses the core CMSIS file (core_cm3.h), which supports all compilers. FOr example, it has constructs like this

#if defined ( __CC_ARM   )
  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */

#elif defined ( __ICCARM__ )
  #define __ASM           __asm                                       /*!< asm keyword for IAR Compiler          */
  #define __INLINE        inline                                      /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */

#elif defined   (  __GNUC__  )
  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */

#elif defined   (  __TASKING__  )
  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */

#endif

So, in summary, you don't need a special GCC version of CMSIS - it is included in the standard files.