EOF issue of SPI Quad Flash S25FL064P, S24FL129P

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

EOF issue of SPI Quad Flash S25FL064P, S24FL129P

813 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by homgin on Thu Feb 21 04:17:34 MST 2013
Dear all,
According to LPC1800 User Manual, SPIFI do support Spansion S25FL064P /S25FL129P.
Unfortunately, it will be EOF soon by the chip vendor. They recommend customers to use S25FL128S for new design.
Does the latest SPIFI library support S25FL128S?
Thanks,


Homgin
Labels (1)
0 Kudos
7 Replies

669 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by ptamo on Fri Feb 21 06:53:24 MST 2014
Hi Hydron,

Thanks for your feedback.
Finally I built a new prototype. This one was able to boot succesfully from S25FL128SAGNFI00 spifi.
We had a combo of problems, the main one was the delay required at reset line when the micro is powered. At the moment we have solved it with a RC at reset line, it seems to work reliably.
At the moment we are not reinitialising the spifi, it runs at default speed. Our first attempt to reinitialize the spifi ended in hard fault. I think that when need to execute the initialization code from RAM in order to avoid this hard fault.
I can confirm you that S25FL128SAGNFI00 is able to run at its maximun speed in a LPC4357, this should also be true for other LPC43.

Rubén
0 Kudos

669 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Hydron on Mon Feb 17 19:12:43 MST 2014
We are using the S25FL128SAGNFI001 in our design with a LPC4350, it seems to boot fine from the ROM, and program fine when the SPIFI library is used.

Checking the micro's registers after bootup suggests the SPIFI peripheral is configured correctly by the boot ROM for optimal execute-in-place SPIFI speeds, so we're not bothering to re-initialise it with the library when using it read-only (we only write to it for firmware upgrades).

We're running it at 64MHz currently, though we tried 96MHz without success. Note that in testing at 96MHz we were lazy and disobeyed the flash datasheet by not changing the timing as specified for speeds over 90MHz. In the future we may try again, but don't want to spend the time now.

Edit: note that we have only tested one board, we'll have some more this week to check, will post if there are any issues.
0 Kudos

669 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by ptamo on Mon Feb 10 04:08:09 MST 2014
Hi mc,

Thanks for your reply.

Our LPC4330 is revision C.

Last week we changed the spifi chip in our board, we mounted a S25FL256SAGNFI00. With this chip the micro was not able to boot either and P1_1 was togging again.
With this spifi chip found that after 60 seconds or after a reset the micro booted. We also did this test an with the S25FL128S without success.

The LPC4330 POR reset circuitry releases reset when the supply is at 2.2v and the equivalent reset circuitry of the S25FLxxxS chips release it at 2.7v. The LPC4330 tries to read the spifi before is powered. We can solve this with a delay adding a RC circuit at reset line, but it will be probably safer to add a external voltage supervisor... No delay is advertised for this spifi chip at the user manual. With a difference in POR voltage of 0,5v is a bit optimistic to assume at the power rail ramp-up time is negligible.

Our prototype board is currently dead, a misconfigured lab supply killed it. I plan to build another prototype this week. I will give another try to the S25FL128S as use this chip in another board. It makes no sense to me that this chip does not work as the only difference seems to be size.

Rubén
0 Kudos

669 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mc on Sat Feb 08 15:22:24 MST 2014
Hi ptamo,
Which revision of LPC4330 chip do you have? RevC version of the chip does not have boot issue. Please wait for 60 seconds after you see 1Hz of P1_1. Does it boot after that?
0 Kudos

669 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by ptamo on Fri Jan 31 08:34:31 MST 2014
Hi,

We are testing a custom board with LPC4330 and S25FL128SAGNFI00 spifi. Using LPCxpresso in debug mode LPC4330 boots and executes code with no issues. Spifi is then reinitialized and it runs at 100Mhz with no issues, code is executed from it.
If we try to boot LPC4330 with no debugger attached, it is unable to boot. Boot selection pins are configured to spifi. We are able to capture clock pulses at 32Mhz at the spifi clk line when the microcontroller tries to boot, but it never does. Pin p1_1 toggles at 1Hz indicating that boot process has failed.

Can you corfirm that chip S25FL128S with is supported for boot? There are 2 variations of this chip, we are using the 64kB sector one, this is the sector size of the S25FL256SAGMFI001 at the "QSPI devices supported by the boot code and the SPIFI API" of the user manual.

We are currently using S25FL128SAGNFI00 with no issues in another custom board with LPC4357 micro, but we use internal flash for boot and then we initialize the spifi later.

Regards
Ruben
0 Kudos

669 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mc on Thu Sep 19 14:02:00 MST 2013
Hi,
Yes, SPIFI Library supports S25FL128S and LPC43xx/LPC18xx devices also support boot from it, however I recommend you to write your own library as all SPIFI registers are in user manual.
You can take hint from threads like

http://lpcware.com/content/blog/introduction-spifi
http://www.lpcware.com/system/files/SPIFI_XIP_Storage.zip
0 Kudos

669 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by econfalonieri on Thu Sep 19 07:12:21 MST 2013
Hi Homgin, I have the same issue with Spansion memories and SPIFI.
Did you find a way to solve it? D
0 Kudos