CTIMER capture via DMA

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CTIMER capture via DMA

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gunnarbohlen
Contributor II

Hi,

I would like to capture a long pulse train with the LPC54618. The input signal is connected to CT0_CAP2 and CT0_CAP3.

Desired low-times and high times in the pulse train is ~150ns. With my current solution it seems to work up to ~250ns pulse width. CPU clock is 160MHz.

I have a working code that does:

configure CAP2 for falling edges

configure CAP3 for rising edged and generate set the int flag.

The software polls the interrupt flag and in case of a detected edge it copies both the capture timestamps into my RAM array. Then it counts the total amount of events and also checks that a maximum time for the desired number of events has not expired.

This works fine up to a certain frequency of the pulse train.

Now I would like to increase the max. frequency and try to use DMA instead of copying the capture resulty via CPU.

Unfortunately I cannot find that a capture event is a DMA trigger. But if I understand correctly I can use the same capture pin as PINT pin and configure the DMA trigger for this pin interrupt.

But I'm not sure if I can do what I want to do via DMA.

Q1:

If a capture event copies a ctimer value into the capture register, and the same event would trigger the DMA,  would there be a conflict with the capture register access (ctimer writes into captureregister,  DMA reads this capture register), and would the write acces have the higher priority?

Q2:

Is it possible to set up the DMA to do:

-with each hw-trigger from a pin copy 2 32bit-words from CTIMER0_CAP (no increment src) to memory (increment dest)

-repeat this n times without additional re-configuration of DMA?

Thank you

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jeremyzhou
NXP Employee
NXP Employee

Hi Gunnar Bohlen,

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
Q1:
If a capture event copies a ctimer value into the capture register, and the same event would trigger the DMA,  would there be a conflict with the capture register access (ctimer writes into capture register,  DMA reads this capture register), and would the write acces have the higher priority?
-- As you pointed out before, the Ctimer capture is unable to trigger the DMA.
To overcome this shortcoming, I think your idea is available, however, it needs to take some validate the possible conflict between writing and reading the capture register simultaneously.
Q2:
Is it possible to set up the DMA to do:
-with each hw-trigger from a pin copy 2 32bit-words from CTIMER0_CAP (no increment src) to memory (increment dest)
-repeat this n times without additional re-configuration of DMA?
-- It's available to implement it via the linker reload the DMA descriptor feature.


Have a great day,
TIC

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