已解决! 转到解答。
Hi XiangJun
Good point - that explains whay this register has a different name. I think it is best to keep the situation as is, because otherwise you could end up by setting the register the same as the others which will end up in a wrong configuration. The registers are not the same!
Suggestion:
Don't change anything and keep things the way they are.
Thank you for your valuable input and making me aware of this.
Dani
Hi, Daniel,
Thank you for your pointing out the drawback of the SYSCON_Type structure. As you know that the UM11060.pdf defines two Table:
Table 121. Flexcomm Interface clock source select registers (FCLKSEL0-9, main syscon: offsets 0x2B0 through
2D4) bit description
Table 122. Flexcomm Interface clock source select registers (FCLKSEL10, main syscon: offset 2D8) bit description
Obviously, the address of FCLKSEL0-9 and FCLKSEL10 are continuous, but the engineers do not compute the address, so they define the FCLKSEL10 independently as the UM. But It does not take effect on the function and performance of the code.
Anyway, I will tell the firmware team of the question.
BR
XiangJun Rong
Hi XiangJun
Good point - that explains whay this register has a different name. I think it is best to keep the situation as is, because otherwise you could end up by setting the register the same as the others which will end up in a wrong configuration. The registers are not the same!
Suggestion:
Don't change anything and keep things the way they are.
Thank you for your valuable input and making me aware of this.
Dani