C_CAN on LPC43xx and other peripherals on the bridge

cancel
Showing results for 
Search instead for 
Did you mean: 

C_CAN on LPC43xx and other peripherals on the bridge

51 Views
NXP Employee
NXP Employee
Content originally posted in LPCWare by inspire on Sat Sep 05 13:40:41 MST 2015
Hi,

in the LPC4370 datasheet it says "Use of C_CAN controller excludes operation of all other peripherals connected to the same bus bridge. See the LPC43xx errata. 45.3 Features"
The block diagram is attached.

Does that mean that if I initialized both C_CAN controllers, I cannot use

I2C0
I2S0
I2S1
MOTOR CONTROL PWM

and

ADC0
ADC1
I2C1
10-bit DAC

anymore?

If I get it right, that sounds like a massive design flaw because it makes crucial peripherals permanently unavailable. The errata sheet mentions some workarounds but they don't seem to fit my needs. Is there a workaround to make both CAN interfaces work together with an I2C interface or a 10 bit ADC? E. g. with a fixed interval: receive I2C data and send it over both CAN interfaces.

Thanks!
inspire
Labels (1)
0 Kudos
2 Replies

1 View
NXP Employee
NXP Employee
Content originally posted in LPCWare by inspire on Mon Sep 14 09:28:07 MST 2015
Hi bavarian,

thanks for your comment! In the meantime I had a look at the LPC4337 because it also seems to have the bugfix (and no LCD because I don't need it). Do you maybe plan to fix this bug for the LPC4370 in the next months? The third core would be quite useful for us.

Thanks!
inspire
0 Kudos

1 View
NXP Employee
NXP Employee
Content originally posted in LPCWare by bavarian on Mon Sep 14 08:42:38 MST 2015
Well, if there would be a better workaround we would have mentioned it in the error sheet ;-)
If you configure the non-CAN interfaces first and let them run without further activities on their registers, then you can modify the CAN registers according to your needs and work with it.
But every write on the non-CAN interfaces registers will change the respective registers of the CAN block. This is what you need to avoid.
The flash version LPC4357 has fixed this bug (2 cores and no high speed ADC).

Regards,
NXP Support Team.
0 Kudos