Ask about SYSCTL_CLOCK_PINT of LPC11Cxx

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Ask about SYSCTL_CLOCK_PINT of LPC11Cxx

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haulam
Contributor II

I am going to merge source code from chip LPC11U24 to LPC LPC1115(using lib chip LPC11Cxx for LPC1115)

But i don't know why the lib chip LPC11Cxx not declare SYSCTL_CLOCK_PINT

#if !defined(CHIP_LPC11CXX)
SYSCTL_CLOCK_PINT, /*!< 19: GPIO Pin int register interface clock, LPC11A/E/Uxx only */

Can explain me about this one because i see that both LPC11Uxx and LPC11Cxx have support GPIO INT.

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3 Replies

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello Hau Lam, 

The LPC11Axx/Uxx can support two kind of interrupts: GPIO Pin interrupt and GPIO Port interrupt, however LPC11xx/11Cxx only have one GPIO interrupt source.So it add bit 19 : PINT and [23:24] bits: PnINT in the SYSAHBCLKCTRL register which is rserved area for LPC11xx/11Cxx.

 

Hope it helps!

Victor.

 

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haulam
Contributor II

@Victor Jimenez,

Thank you for your information . 

I have another concern about IRQ Type ,

In the cmsis_11cxx.h , it define some kinds of interrupt 

typedef enum LPC11CXX_IRQn {
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Cortex-M0 Hard Fault Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M0 SV Call Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M0 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M0 System Tick Interrupt */

PIO0_0_IRQn = 0, /*!< GPIO port 0, pin 0 Interrupt */
PIO0_1_IRQn = 1, /*!< GPIO port 0, pin 1 Interrupt */
PIO0_2_IRQn = 2, /*!< GPIO port 0, pin 2 Interrupt */
PIO0_3_IRQn = 3, /*!< GPIO port 0, pin 3 Interrupt */
PIO0_4_IRQn = 4, /*!< GPIO port 0, pin 4 Interrupt */
PIO0_5_IRQn = 5, /*!< GPIO port 0, pin 5 Interrupt */
PIO0_6_IRQn = 6, /*!< GPIO port 0, pin 6 Interrupt */
PIO0_7_IRQn = 7, /*!< GPIO port 0, pin 7 Interrupt */
PIO0_8_IRQn = 8, /*!< GPIO port 0, pin 8 Interrupt */
PIO0_9_IRQn = 9, /*!< GPIO port 0, pin 9 Interrupt */
PIO0_10_IRQn = 10, /*!< GPIO port 0, pin 10 Interrupt */
PIO0_11_IRQn = 11, /*!< GPIO port 0, pin 11 Interrupt */
PIO1_0_IRQn = 12, /*!< GPIO port 1, pin 0 Interrupt */
CAN_IRQn = 13, /*!< CAN Interrupt */
SSP1_IRQn = 14, /*!< SSP1 Interrupt */
I2C0_IRQn = 15, /*!< I2C Interrupt */
TIMER_16_0_IRQn = 16, /*!< 16-bit Timer0 Interrupt */
TIMER_16_1_IRQn = 17, /*!< 16-bit Timer1 Interrupt */
TIMER_32_0_IRQn = 18, /*!< 32-bit Timer0 Interrupt */
TIMER_32_1_IRQn = 19, /*!< 32-bit Timer1 Interrupt */
SSP0_IRQn = 20, /*!< SSP0 Interrupt */
UART0_IRQn = 21, /*!< UART Interrupt */
Reserved22_IRQn = 22,
Reserved23_IRQn = 23,
ADC_IRQn = 24, /*!< A/D Converter Interrupt */
WDT_IRQn = 25, /*!< Watchdog timer Interrupt */
BOD_IRQn = 26, /*!< Brown Out Detect(BOD) Interrupt */
Reserved27_IRQn = 27,
EINT3_IRQn = 28, /*!< External Interrupt 3 Interrupt */
EINT2_IRQn = 29, /*!< External Interrupt 2 Interrupt */
EINT1_IRQn = 30, /*!< External Interrupt 1 Interrupt */
EINT0_IRQn = 31, /*!< External Interrupt 0 Interrupt */
} LPC11CXX_IRQn_Type;

so can i know what is different between PIO0_0_IRQn and EINT0_IRQn .

Let say if i want to register interrupt for port 2 pin 10 of chip LPC1115 ,

What type of IRQ should i use ?

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello Hau Lam, 

Sorry for the late response. 

The port pins PIO0_0 to PIO0_11 and PIO1_0 are connected to the start logic and serve as wake-up pins. Furthermore, the interrupts corresponding to each input must be enabled in the NVIC. Interrupts 0 to 12 in the NVIC correspond to 13 PIO pins.
Meanwhile, each individual port pin can serve as an edge or level-sensitive interrupt request Interrupts which can be configured on single falling or rising edges and on both edges, and Interrupts 28 to 31 corresponding to these port pins.
For your implementation, you should enable the interrupt 29.

 

Hope it helps!

Victor.

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