Adding an interrupt handler for eeprom reads and writes

[volkan_coskun]

Hello!

I have now a working IAP EEPROM driver that works together with interrupts.

I had to move the interrupts vectors to address 0x10000000 into SRAM in order to make it work.

However, since reads and writes are hardware dependent,

I want to know when my read or write operation is done so that I can queue every interrupts and notice the processor.

Is there anyway to add an interrupt handler for the IAP eeprom library that is used?

An hard-fault will occur if I have a for loop and write to the IAP without any delay but if I add a delay of 1 ms things are fine (still testing will run it 1 day).

I want to have working writes and reads in the background (queue based) where an interrupt shall indicate when a write transaction is complete so that I do not write under a write transaction ( causing abnormal behavior such as hard faults and etc).

Is there anyway to add a custom made interrupt handler for this kind of problem ?

What is the way to go?

PS+

This is the continuation of the following problem in :

Is there any way to remove the interrupt handling in the IAP eeprom for LCP11XX 

The goal is to have an interrupt handler for the EEPROM indicating when a write or read is done:

Here is an example code:

/* EEPROM interrupt handler */

void eeprom_interrupt_in_bgo()

{

   interrupt_que_eepromWrite()

   interrupt_que_eepromRead() 

// when done issue next write or read in order to synch writes 

}

[volkan_coskun]

Hello again jeremyzhou‌

Ah ok.

Thanks for the answer I guess I have to look for other solutions then.

Apart from the current solution, will NXP come up with a more robust solution in order to handle time critical applications for future processors?

We are in need of an EEPROM driver that shall work without disabling or enabling the interrupts.

I have also seen some legacy solution where a  ".a" is provided, thus, working without interrupt handling.

regards,

Volkan  

[jeremyzhou]

Hi Volkan Coskun,

Thanks for your reply.
1) Apart from the current solution, will NXP come up with a more robust solution in order to handle time-critical applications for future processors?
-- As I know, there's no similar plan, however, I'll contact the AE team to confirm it.

Have a great day,
TIC

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[volkan_coskun]

Also, how long does it takes for reads and writes when using EEPROM.

I could not really find it in the datasheets while I was looking.

regards,

Volkan Coskun

[jeremyzhou]

Hi

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1) Is there any way to add an interrupt handler for the IAP EEPROM library that is used?
-- No, I'm afraid not, in addition, there's a suggestion below from the AN11511.
During EEPROM write and read operations, the interrupts must be disabled for proper IAP operation.

2) The dynamic characteristics of the EEPROM.

Have a great day,
TIC

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[volkan_coskun]

jeremyzhou‌

Aha ok,

I am still a little bit confused here.

What was the purpose of moving the interrupt vectors from 0x00000000 to 0x10000000?

I thought the reason why we had to move the interrupt vectors was simple because to enable interrupts during EEPROM  write/read transactions, and thus, letting other interrupts run without intervening them , i.e.,  disable or enable.

Is there any other alternative for EEPROM ?

To sum it up,

it is not possible to use the EEPROM IAP or any other library with interrupts enabled, and, this is also true for when we move the interrupt vectors or let them be as it is.

Have I understood the manual and the IAP eeprom library correctly ?

regards,

Volkan Coskun

[jeremyzhou]

Hi Volkan Coskun,

Thanks for your reply.
1) Have I understood the manual and the IAP EEPROM library correctly?
-- In general, you're correct. The interrupt vector remap can allow the interrupts to occur even during the IAP routines are used except for EEPROM to write and read operations.

Have a great day,
TIC

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