* Enables the clock for the I/O controller.: Enable Clock. */
CLOCK_EnableClock(kCLOCK_Iocon);
const uint32_t port1_pin23_config = (/* Pin is configured as FC2_SCK */
IOCON_PIO_FUNC1 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Fast mode, slew rate control is disabled */
IOCON_PIO_SLEW_FAST |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI
/* Analog switch is closed (enabled) */
);
/* PORT1 PIN23 (coords: 21) is configured as FC2_SCK */
IOCON_PinMuxSet(IOCON, 1U, 23U, port1_pin23_config);
const uint32_t port0_pin26_config = (/* Pin is configured as FC2_MOSI */
IOCON_PIO_FUNC1 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Fast mode, slew rate control is disabled */
IOCON_PIO_SLEW_FAST |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI
/* Analog switch is closed (enabled) */
);
/* Port0 pin26 configured as FC2_MOSI */
IOCON_PinMuxSet(IOCON, 0U, 26U, port0_pi26_config);
const uint32_t port1_pin25_config = (/* Pin is configured as FC2_SCK */
IOCON_PIO_FUNC1 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Fast mode, slew rate control is disabled */
IOCON_PIO_SLEW_FAST |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI
/* Analog switch is closed (enabled) */
);
/* PORT1 PIN25 (coords: 21) is configured as FC2_MISO */
IOCON_PinMuxSet(IOCON, 1U, 25U, port1_pin25_config);
const uint32_t port1_pin26_config = (/* Pin is configured as FC2_SSL3 */
IOCON_PIO_FUNC1 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Fast mode, slew rate control is disabled */
IOCON_PIO_SLEW_FAST |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI
/* Analog switch is closed (enabled) */
);
/* PORT1 PIN25 (coords: 21) is configured as FC2_MISO */
IOCON_PinMuxSet(IOCON, 1U, 26U, port1_pin26_config);
Secondly, because you use FC2_SSL3 pin, you have to clear the TXSSEL3_N bit,
while set the TXSSEL0_N,TXSSEL1_N,TXSSEL2_N bits in the FIFOWR register, in this way,
in master mode of SPI,the SSL3 pin will be asserted.
If you use spi driver, pls check where you can change the TXSSEL3_N bit.
Hope it is helpful.
BR
XiangJun Rong