4370 PLL0 What is Free Running and why would I want it.

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4370 PLL0 What is Free Running and why would I want it.

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by MikeSimmonds on Mon Mar 09 22:48:24 MST 2015
Yet again the NXP user manuals document a chip register bit with a bare name and a description
that says turn it on or off.

This is just not good enough. We need to know what the setting DOES and what it is GOOD FOR.

The current case in point is [UM10503 LPC4370 and others] bit 6 of PLL0USB control and also PLL0AUDIO.

"6 FRM Free running mode 0 R/W"

On the very face of it, "free running mode" seems entirely contrary to the whole point of PLL's.

So please, explain the feature you have built in to you silicon IP at no doubt great expense and give examples of its usage.

Or is there an AppNote that I have missed?

And this business about encoded M, N, and P values etc.

Rather than give iterative pseudo code, why can't we have a table of desired M (or whatever) and the corresponding register setting.

And what about going the other way; from a register value to a M/N/P integer? [For debugging of course.]

EDIT: there do seem to be some sort of tables (far away) from the code formulas, but I am not sure that I actually understand them.

Regards, Mike
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by xianghuiwang on Sat Mar 14 10:05:12 MST 2015
Hi Mike,
You may read about this link to understand pll free running mode:
http://www.rfwireless-world.com/Terminology/PLL-lock-range-vs-capture-range.html
Regards,
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