2 channel HSADC (40 Msps) and DMA

[lorenz_aebi]

Hi all

we need the LPC4370 for sampling 2 ADC channels with 20 Msps each (not continous but 1000 samples per channel in a row). This works with the Audio PLL at 80 MHz very well. We are able to acquire 1000 samples per channel every 100us. We are able to transfer those aquired data to an external Memory area. The only problem we have is, that at the start of each such 1000 samples we have 8 samples from the last measurement (see picture). Can somebody help us to find where we can delete those values? We want to aquire 1000 samples every 10kHz and this should be pretty synchronous without a jitter. This aquisition we repeat for 20'000 times (within 2 seconds).

We start the DMA transfer all 10kHz:

LPC_GPDMA->CH[ADCHS_TO_MEMORY_DMA_CHANNEL].CONFIG &= ~GPDMA_DMACCxConfig_H;
/* Setup DMA Transfer */
bool success = Chip_GPDMA_Transfer(LPC_GPDMA,
    ADCHS_TO_MEMORY_DMA_CHANNEL,
    GPDMA_CONN_HSADC_Read,
    dstAddress,
    GPDMA_TRANSFERTYPE_P2M_CONTROLLER_DMA,
    length
);

We setup the HSADC the following way:

  /* Initialize HSADC */
  Chip_HSADC_Init(LPC_ADCHS);
  Chip_HSADC_SetPowerSpeed(LPC_ADCHS, false);
  Chip_HSADC_DisablePowerDownMode(LPC_ADCHS);
  Chip_HSADC_FlushFIFO(LPC_ADCHS);

  /* Setup FIFO trip points for interrupt/DMA to 8 samples, with packing */
  Chip_HSADC_SetupFIFO(LPC_ADCHS, FIFO_SAMPLES_ADCHS, true);
  Chip_HSADC_SetActiveDescriptor(LPC_ADCHS, TABLE_0, DESCRIPTOR_0);

  /* Software trigger only, 0x90 recovery clocks, add channel IF to FIFO entry */
  Chip_HSADC_ConfigureTrigger(LPC_ADCHS, HSADC_CONFIG_TRIGGER_SW,
      HSADC_CONFIG_TRIGGER_RISEEXT, HSADC_CONFIG_TRIGGER_NOEXTSYNC,
      HSADC_CHANNEL_ID_EN_ADD, RECOVERY_TIME_ADCHS_CLK);
  Chip_HSADC_SetupDescEntry(LPC_ADCHS, TABLE_0, DESCRIPTOR_0, (HSADC_DESC_CH(CHANNEL_0) |
      HSADC_DESC_BRANCH_NEXT | HSADC_DESC_MATCH(MATCH_VALUE) | HSADC_DESC_THRESH_NONE |
      HSADC_DESC_RESET_TIMER));
  Chip_HSADC_SetupDescEntry(LPC_ADCHS, TABLE_0, DESCRIPTOR_1, (HSADC_DESC_CH(CHANNEL_1) |
      HSADC_DESC_BRANCH_FIRST | HSADC_DESC_MATCH(MATCH_VALUE) | HSADC_DESC_THRESH_NONE |
      HSADC_DESC_RESET_TIMER | HSADC_DESC_UPDATE_TABLE));

  Chip_HSADC_EnablePower(LPC_ADCHS);
  /* Setup HSADC interrupts on group 0 - FIFO overrun error, and descriptor status */
  Chip_HSADC_EnableInts(LPC_ADCHS, GROUP_0, (HSADC_INT0_FIFO_OVERFLOW | HSADC_INT0_DSCR_ERROR));

  /* Update descriptor tables - needed after updating any descriptors */
  Chip_HSADC_UpdateDescTable(LPC_ADCHS, TABLE_0);

  Chip_HSADC_SWTrigger(LPC_ADCHS);

The HSADC is running the whole time and we just setup a new DMA transfer every 10kHz, could be this done better by adjusting the Descriptor tables. For me this is not clear and I tried different description table but without success. How should the descriptor table look like when we want to sample 2 channels with 20 Msps each and 1000 samples shall be aquired?

Thank you very much for your support and best regards

Lorenz

[jeremyzhou]

Hi

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1) Can somebody help us to find where we can delete those values?
-- Issuing a FIFO flush command to clear the FIFO before ADCHS sampling.
2) How should the descriptor table look like when we want to sample 2 channels with 20 Msps each and 1000 samples shall be acquired?
-- Actually, I'm not very clear with this question, whether you can clarify it.

Have a great day,
TIC

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[lorenz_aebi]

Hi TIC

1) It has no influence when we flush the FIFO before the measurement as we never stop the measurement. How it is possible to stop a HSADC measurement? Probably knowing how to stop a measurement is the solution to both open questions.

2) How should the descriptor table look like when we want to sample 2 channels and each channel is sampling with 20 Msps? So in total 40 Msps divided to 2 channels. First how should the descriptor table look like when we want to sample an infinit time? Second how should the descriptor table look like when we want to sample 'only' 1000 samples and then stop sampling.

Thanks for your support and have a great day

Lorenz

[jeremyzhou]

Hi Lorenz Aebi,

Thanks for your reply.
I'd like to suggest using the HALT feature combine the external trigger to manage the number of sampling, in addition, the ADCHS can be 'pend' for a while as the enable the HALT feature, during the 'pend' status, it's available to flush the ADC FIFO.

Have a great day,
TIC

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[lorenz_aebi]

Hi jeremyzhou

thank you for your answer. I checked the UM10503 and did not find the HALT feature of the ADCHS. Can you please explain me in more detail how to set this up what you suggest. Can you please do an example or a link to a document / url?

The only register related to external trigger is the 'ADCHS_TRIGGER_IN', but as far as I understand this is only useful for starting the ADC but not stopping / halt it.

I think your suggested way is exactly what we need to solve our issue.

Thank you again for your support

Lorenz

[jeremyzhou · Accepted solution]

Hi Hi Lorenz Aebi,

Thanks for your reply.
You can learn the information about the HALT feature by review Fig 1 which is grabbed from the Descriptor table register.

Have a great day,
TIC

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[lorenz_aebi]

Hi jeremyzhou

thank you very much for your support. Now it is working as expected. I added:

  Chip_HSADC_SetupDescEntry(LPC_ADCHS, TABLE_1, DESCRIPTOR_0, (
      HSADC_DESC_HALT | HSADC_DESC_MATCH(MATCH_VALUE) | HSADC_DESC_THRESH_NONE |
      HSADC_DESC_RESET_TIMER)
      );

To stop the aquisition I just switch to the table_1 and descriptior_0, and then I can flush the fifo:

  Chip_HSADC_SetActiveDescriptor(LPC_ADCHS, TABLE_1, DESCRIPTOR_0);
  Chip_HSADC_FlushFIFO(LPC_ADCHS);

Best Regards

Lorenz

[vitaliylivnov]

Hi, lorenz.aebi@helbling.ch‌

I will answer the second question. Your descriptor table will remain the same, however MATCH_VALUE = 1 for each table. If you want to limit the number of samples to 1000, you must do this in the DMA setting length, not the descriptor table.

[lorenz_aebi]

Hi Vitaliy Livnov

thank you for your answer and the confirmation that our descriptor table seems to be OK. The MATCH_VALUE is set to 1.