Using the New Clocks Tool to configure a custom K24F board with a 32 MHz external crystal.

[peterfurey]

Hello,

I'm trying to configure a custom K24F based board with a 32 MHz external crystal using the new clock configuration tool (KExTools v2.0). I'm using KDS v3.2 with KSDK v2.0 and I can get a useable configuration using the FEI mode but I want to use the external crystal. I'm currently trying the attached configuration. The crystal is attached to the board using Connection type 1 (Figure 26-2 from K24P144M120SF5RM.pdf).

All of the relevant register settings look like I would expect them to be, however, when I try to run with this configuration the application hangs in fsl_clock.c: CLOCK_SetExternalRefClkConfig() at

Waiting for the OSCINIT0 bit to get set. When I put a probe on EXTAL0 and XTAL0 I see no activity, both low. We also tried swapping out the 32MHz crystal with a 8MHz crystal (and different connection types) and got the same results. I've also tried all of the other external MCG modes with no luck either. The crystal we're using is ECX-53B SMD Quartz Crystal, part number ECS-320-8-30B.  Any suggestions on what else to try or ideas on what the problem might be?

Much thanks,

Peter

[Jonathan_Iglesias]

Dear peterfurey‌,

Hope you are doing great.

I will attach a project for the FRDM kl25z that do what you are trying to.

to get to PEE you first you have to transition from FEI > FBE >PBE > PEE.

check figure 1

Figure 1

 to do the transition see this in the main.c.

/* Move from FEI to FBE */
MCG_FEI_to_FBE();
/* Move from FBE to PBE */
MCG_FBE_to_PBE();
/* Move from PBE to PEE */
MCG_PBE_to_PEE();

also please check if you have enabled the EXTAL and XTAL this is done in the mcg.c.

Hope this works and have a great day.

Jonathan

[peterfurey]

Hi Jonathan,

Thank you for your response. I'll compare this with what I have and see where it differs. One question though, you state that EXTAL and XTAL have been enabled in mcg.c but I don't see these pins being referenced anywhere.

Best,

Peter 

[Jonathan_Iglesias]

Hello Peter,

I am sorry I did not explained properly.

in this part is done the configuration.

/* Clear RANGE field before writing a new value */ MCG_C2 &= ~MCG_C2_RANGE_MASK; /* As external reference clock is greater than 8MHz, high frequency * range (01) must be selected and select oscillator request */ MCG_C2 |= MCG_C2_RANGE(1) | MCG_C2_EREFS0_MASK; /* NOTE: If Crystal is used, then enable OSC module */ OSC0_CR |= OSC_CR_ERCLKEN_MASK;

In the reference manual (in this case is the KL25Z because the example is for that board) you will find this section

the EREFS0 is used to enable an External Reference

Hope this help you. 

Have a great day !

Jonathan

[peterfurey]

Hello  again Jonathan,

OK, I was able to eliminate the ARM core LOCKUP event by reducing the clock frequencies. In particular, I changed the PRDIV value from 8 to 16 resulting in the system clock going from 96 MHz to 48MHz. However, I still don't understand why the higher frequency clocks would result in a LOCKUP event since it's within the specs of the MCU. Any insights from anyone on this would be appreciated. Otherwise I'll continue on my merry way for the time being. Thank you. Peter

[peterfurey]

Hi Jonathan,

I think I'm getting closer. I modified the mcg.c module to work with my custom board using a 32MHz external crystal and a MK24FN1M0VLL12 MCU. I've attached mcg.c because I'm unable to cut and paste for some reason with Window 10. In my main I'm able to successfully proceed through each transition (see below). However, after the final transition MCG_PBE_to_PEE(), the next function call results in the Reset_Handler getting called.

int main(void)

{

BOARD_InitPins();

CLOCK_SetXtal0Freq(32000000U);

MCG_FEI_to_FBE();    // transitioned successfully

MCG_FBE_to_PBE();  // transitioned successfully

MCG_PBE_to_PEE();  // appears to transition successfully

delay(DELAY_VALE);    // Reset occurs here

for (;;)

{

  ___asm("NOP");

}

}

Looking at the Reset Control Module (RCM), I see that the LOCKUP bit in the RCM_SRS1 register gets set. Indicating an ARM core LOCKUP event. Any idea what might be causing this?

Thanks,

Peter