MKW30Z; SDK1.3; IAR; PORT_HAL_SetMuxMode

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MKW30Z; SDK1.3; IAR; PORT_HAL_SetMuxMode

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1,232 次查看
lucianfiran
Contributor V

Try to set mux pins for MKW30Z with SDK1.3 in IAR with PORT_HAL_SetMuxMode but port_mux_t gives
kPortPinDisabled, kPortMuxAsGpio, kPortMuxAlt2, kPortMuxAlt3, kPortMuxAlt4, kPortMuxAlt5, kPortMuxAlt6, kPortMuxAlt7
 while the Data Sheet refers in Table 42. KW40Z Pin Assignments:
DEFAULT, ALT0, ALT1, ALT2, ALT3, ALT4, ALT5, ALT6, ALT7.
What is the mapping for ALT0 and ALT1 ?

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985 次查看
ivadorazinova
NXP Employee
NXP Employee

Hi Lucian,

kPortMuxAsGpio

If you enable PTA18 to ALT1, you get GPIO - PTA18 or LLWU_P6 (Low Leakage Wakeup Unit)

kPortPinDisabled

ALT0 - TSI0_CH12 - If you don´t enable TSI peripheral and don´t configure this electrode, this pin is disabled.

I hope this helps you.

Have a nice day.

Iva

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985 次查看
lucianfiran
Contributor V

Thank you,

start reading Ref Man on page page 192
10.5.1 Pin Control Register n (PORTx_PCRn)

it seems that the naming was not so intuitive for me

kPortPinDisabled == ALT0
kPortMuxAsGpio == ALT1
kPortMuxAlt2 == ALT2
kPortMuxAlt3 == ALT3

.......

and DEFAULT should be reset value.pin_mux.png

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ivadorazinova
NXP Employee
NXP Employee

Hi Lucian,

you are welcome.

Please, what is not clear for you?

ALT0 is Alternative 0 -> 000 Pin disabled

ALT1 is Alternative 1 -> 001 GPIO

ALT2 is Alternative 2 -> 010 chip-specific

....

It´s way of marking.

In case of any other questions, please let me know.

Best Regards,

Iva

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986 次查看
ivadorazinova
NXP Employee
NXP Employee

Hi Lucian,

kPortMuxAsGpio

If you enable PTA18 to ALT1, you get GPIO - PTA18 or LLWU_P6 (Low Leakage Wakeup Unit)

kPortPinDisabled

ALT0 - TSI0_CH12 - If you don´t enable TSI peripheral and don´t configure this electrode, this pin is disabled.

I hope this helps you.

Have a nice day.

Iva

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