KSDK 2.0 EDMA + FTM + GPIO, early start of DMA request

[thinkberg]

Hi,

I tried reimplementing Erich Stygers code for KSDK 2.0. However, I see a strange problem where the second round of setting up the DMA channel request initiates the first DMA request earlier than expected.

I use 3 FTM timers as triggers for the EDMA request. I also de-initialize FTM, DMA and GPIO before and after the process.

The code can be found here: K82F EDMA PWM WS2812b (Kinetis SDK 2.0) · GitHub

The first time I send data to the LED using this method everything is fine. All the bits are sent perfectly.

The second time however, as soon as the code enables the DMA transfer in K82F EDMA PWM WS2812b (Kinetis SDK 2.0) · GitHub:215 (EDMA_StartTransfer) it will send out the first bit, however since there is some more code before the timer is started and triggering the actual DMA this bit is way too long as can be seen in the following picture:

You can see the timers starting in channel 01, 02, 03 and the next bits are also fine, just what is between A1 and A2 is wrong.

I tested it a few times, but it looks like the DMA request to the GPIOD->PSOR is triggered too early. As if the EDMA is not reset completely. Since I set the FTM timer as a trigger source for the DMA transfer it should not happen as I enable that timer much later on.

Any help will be appreciated.

Leo.

[xiangjun_rong]

Hi, Jugel,

In the end, I see your application. But for the unexpected high logic from A1 to A2, I have not idea which source set the pin and clear the pin.

But I think you can use code to read the GPIOD5 pin so that you can know the instruction which sets the pin.

You can connect the RGB_DIN signal to another GPIO pin and configure the pin in GPIO and Input mode, you can read the pin logic, if it is 1, stop to debug

instruction;

if(GPIOx_PDIR&1<<pin_index)
{

__asm("nop");  //set a break here

}

In  this way, you can know which instruction leads to the GPIO set.

BTW, even if you configure the GPIOD5 as GPIO output mode, you still can read the pin logic via GPIOD_PDIR register I think.

Hope it can help you.

BR

XiangJun Rong