HI Jorge,
Thanks for your answer,
On the last screenshot, the 9th bit is '1' NACK, the I2C driver interprets any NACK as a failed transmission, ok I agree with this. But on screenshot I don't see the stop signal, so I said "the bus crash" because after this frame, when I want to send another frames , the driver return "bus busy" and only a "deinit" and "init" of the I2C module can relaunch the communication.
Why the stop signal is not send ?
Could you explain the behavior after the 9th bit ? (indicate in the red circle on the following screenshot)

In addition, if we return on the second screenshot I posted :

On this screenshot there is no problem with "ack" but the bus crash and after this frame, the bus state is "bus busy" and I can't communicate.
Why the I2C module stop after send only one clock ?
Why during the clock stretching, the sda line go down and up ? (the 0.8V low level indicate that was the master at origin of this spike)
Thank you for your help,
Regards,
Pierre-Etienne TAPIE