MKV46F256VLH16 - SPI0_SOUT on PIN 51/PTC6 - Cip MASK 1N72K

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MKV46F256VLH16 - SPI0_SOUT on PIN 51/PTC6 - Cip MASK 1N72K

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Kubiznak
Contributor II

Good day,

when debugging communication with SPI EEPROM, there is no data on Pin51/PTC6 in the ALT2 setting (SPI0_SOUT). The pin is permanently low. After porting to Pin63/PTD6 in the ALT7 setting, the data is output correctly. Is there another way to activate the data output on Pin51/PTC6 or does this pin not actually have this functionality?

Thank you

--
Jaromir Kubiznak

Dobrý den,

při ladění komunikace s SPI EEPROM nejsou na Pinu51/PTC6 v nastavení ALT2 (SPI0_SOUT) data. Pin je trvale v nízké úrovni. Po přeportování na Pin63/PTD6 v nastaveni ALT7 data vystupují správně. Je cesta jak jinak aktivovat výstup dat na Pinu51/PTC6 nebo tento pin ve skutečnosti tuto funkcionalitu nemá?

Děkuji

-- 
Jaromir Kubiznak

 

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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi Jaromir Kubiznak,

PTC6 and PTC7 have true open-drain outputs thus when enabled as outputs, an external pull-resistor is required if output is logic 1.(You can find the information in KV4XP100M168RM Kinetis KV4x: 168 MHz Arm® Cortex®-M4 up to 256KB Flash (100pin))

47.1.2 Number of GPIO signals.png


Best Regards,
Robin
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Kubiznak
Contributor II

Hi Robin,

thank you very much for your help. After installing the Pull Up resistors the SPI finally started working properly.

Jaromir

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Robin_Shen
NXP TechSupport
NXP TechSupport

You are welcome!
I am glad to hear that it works now.

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3,046 Views
Kubiznak
Contributor II

Hi Robin,

thanks for the link to Keil. We use IAR and the source files are the same. Unfortunately, I overlooked that PTC6 and PTC7 are open collector in ALT2, which I didn't expect for fast SPI communication. We looked for a bug in the driver and suspected a chip bug. Pull Up resistors explain everything. Thanks again.

Best regards,

Jaromir

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