make watch dog not to reset

[enricoreginato]

hi

my name is enrico

I am developing a software on kinetics k60 mcu

I would like to set watch dog ISR to avoid a reset on next watchDog IRQ. I think I need to refresh watchdog timer and clear his IRQ flag inside ISR.

(otherwise on 2nd IRQ mcu will reset)

is it possible??? I've searched everywhere but can't find how to...

thank you to all...

[martynhunt]

Hi Enrico,

It is not possible to refresh or update the watchdog inside the watchdog ISR. When the interrupt is triggered, the watchdog has already timed out. Inside the watchdog ISR it is necessary to clear the interrupt flag, and then perform other actions you wish to perform when the watchdog has timed out. All actions, after the interrupt is triggered, must be completed within the WCT (256 bus clock cycles). After which, the watchdog will trigger a reset. See the following code snippet for some examples on what can be done in the watchdog ISR:

void Watchdog_IRQHandler(void)
{
   WDOG->STCTRLL |= WDOG_STCTRLL_INTFLG_MASK; //Clear interrupt flag

   g_wdogIrqFlag++; //Increment g_wdogIrqFlag variable to indicate interrupt has occurred

   PTD->PTOR |= (1 << 12);  //Toggle GPIO
   PTD->PTOR |= (1 << 12);  //Toggle GPIO



}

Note for g_wdogIrqFlag, this variable must be in a location of RAM that is not refreshed, or cleared, during the reset flow in order for it to indicate a watchdog time out event after the reset.

Best regards,

Martyn

[enricoreginato]

Hi, Martyn

thank you for the reply.

I've understood what you mean(it's not possible to avoid the reset after 256 clk) and tried to write an ISR(see code in my other answer)

But when I run the code it doesn't do anythng.

..any solution??

thank you all,      enrico

[martynhunt]

Hi Enrico,

What frequency are your bus & flash clocks running? You most likely are not able to complete the write to Flash within the 256 bus clock cycles. I would suggest writing to a section of RAM that is not modified during the reset flow.

Also, have you had a chance to check that the interrupt handler is being entered by toggling and monitoring a GPIO?

Best regards,

Martyn

[enricoreginato]

..I already tried to refresh watchDog and clear flag inside ISR but seems like the execution does not even get to the ISR, it goes directly to reset

..P.S: I'M WORKING WITH PROCESSOR EXPERT to generate code..

[martynhunt]

In my other post, I mention that after the interrupt is triggered, a reset will occur after 256 bus clock cycles. 256 bus clock cycles can go by very quickly and you may not be able to see the ISR entered before the reset occurs. I would suggest hooking up a GPIO pin to an oscilloscope to see it toggle inside the ISR to make sure the ISR is being entered.

Best regards,

Martyn

[bobpaddock]

Yes, the watchdog needs refreshed.

However a watchdog shall never be refreshed from inside a ISR.

The reason is that the ISR could still be running correctly, say a timer ticking every 10ms just fine, while the rest of the system is crashed.

A proper watchdog system will have tasks check in to a single watchdog task with a bounded windows of allowable times (refreshing to fast or to slow is just as bad as no refresh at all).

The single mainline task refreshes the hardware watchdog when all of the tasks have checked in appropriately.

We can't address why your ISR is not working without more information, like which ISR are you trying to use (and shouldn't)?

[enricoreginato]

Hi

thank you very much for having answered

..sorry for the late reply but have been sick lasts days

yes, the reason I wanted to refresh WDog inside ISR was that 256 clk cycle before RESET are a bit too few ..i would like to: SAVE a simple error log like WDogError@CurrentTime (to flash so non volatile)

btw, the real problem now is according to me ISR does not execute

..so this is my code related to the WDog (Processor Expert):

********start**********

PE_ISR(WDog1_Interrupt)

{

  /* {Default RTOS Adapter} ISR parameter is passed through the global variable */

  WDog1_TDeviceDataPtr DeviceDataPrv = INT_Watchdog__DEFAULT_RTOS_ISRPARAM;

  WDog1_OnWatchDog(DeviceDataPrv->UserDataPtr); /* Invoke OnWatchDog event */

  WDOG_PDD_ClearInterruptFlag(WDOG_BASE_PTR); /* Clear interrupt flag */

}

void WDog1_OnWatchDog(LDD_TUserData *UserDataPtr)

{

//save error report on flash

  //eg: WDog timeout @ curretnTime()

  faultLog_t faultLog_temp;

  faultLog_temp.faultType = WDOG_TIMEOUT;

  faultLog_temp.faulTime.secondInDay = 66;//casual

  faultLog_temp.faulTime.daySince2000 = 77;//casual

  nvm_flashLog_t *LogPtr = (nvm_flashLog_t *) nvm_data_startAddr;

  IFsh1_TAddress ptr = (IFsh1_TAddress) &(LogPtr->faultLog[1]);

  IFsh1_SetBlockFlash((IFsh1_TDataAddress) &faultLog_temp,(IFsh1_TAddress) ptr, sizeof(faultLog_t));

}

********end***********

PS: if i call WDog1_OnWatchDog() for test the ISR it does write what I want.

..what's wrong?  Am I forgetting something?

..does it require more than 256 clk cycle?

thank you to all...