k20 reset pin filter

[leimao]

I used MK20DX256ZVMC10. Want use reset pin filter function. But no works.

If we make reset pin low level < 5mS, the k20 will not reset. But k20 reset.

Where are the problem?

k20 datasheet:

The RESET pin supports digital filtering in all modes of operation. For LLS and VLLSx
modes, the LLWU provides an optional fixed digital filter running off the 1 kHz LPO
clock.

The LPO filter is simple with a fixed filter value count of 3. There is also a synchronizer
on the input signal that results in an associated latency (2 cycles). As such, it takes 5
cycles to complete a transition from low-to-high or high-to-low. The LPO Filter
initializes to off (logic 1) when the LPO filter is not enabled.

code :

SIM_SOPT6 |= (0x02 << 29);

[leimao]

seems it's chip bug. the old chip cannot use this function

[xiangjun_rong]

Hi, MaoLei,

I have checked the data sheet of K20, the minimum width of Reset signal is 100nS with digital filtering disabled. In order to avoid to reset the chip with noise, we add the digital filtering feature, the short low logic is regarded as noise.

With LPO clock as filtering clock, I think the 5ms is the minimum requirement. If you set the Reset signal with 6ms,7ms....low width, can you reset the chip or not?

BR

Xiangjun rong

The LLWU implements optional 3-cycle glitch filters, based on the LPO clock. A
detected external pin, either wakeup or RESET, is required to remain asserted until the
enabled glitch filter times out. Additional latency of up to 2 cycles is due to
synchronization, which results in a total of up to 5 cycles of delay before the detect
circuit alerts the system to the wakeup or reset event when the filter function is enabled.
Two wakeup detect filters are available to detect up to two external pins. A separate reset
filter is on the RESET pin. Glitch filtering is not provided on the internal modules.
For internal module wakeup operation, the WUMEx bit enables the associated module as
a wakeup source.