full description of FRDM-K64F

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full description of FRDM-K64F

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Contributor II

Hi, so far I have been using Texas launchpad TIVA with Keil and now I want to try the development board FRDM-K64F. I have the board but I was unable to find a document with the full description of registers (addresses, configuration etc.)

I have been looking in this link: FRDM-K64F Platform|Freedom Development Board|Kinetis MCUs | NXP 

and I'm looking for something fully complete like this one http://www.ti.com/lit/ds/spms376e/spms376e.pdf 

Some info/ examples using Keil uVision Will also be appreciated

Thanks

Marcos

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Contributor II

hi,

even worse. Now I only see the bootloader and after copying the opensda and re-pluging again the board, windows does not detect the board. By the way, I use win'7.

I gave up keil uVision for this board. it is by far much more complex than launchpad TIVA. I will try now with MCUXpresso tools

regards

Marcos

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NXP TechSupport
NXP TechSupport

Hi Marcos Faundez Zanuy,

   Do you modify the K20 chip code?

   When you see the bootloader, which firmware you copy to the BOOTLOADER disc?

   Do you have any external debugger, eg, JLINK, you can try to download the opensda2.2 firmware to the K20, then use the new DAPLink rev0244 OpenSDA v2.2 Bootloader.

   Of course, you also can try the MCUXpresso IDE, whether you can download the code or not with the JLINK firmware? Just to check whether your problem is in the debugger side or the IDE side.

Any updated information, please let me know.

Kerry

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Contributor II

HI, I just uploaded the file 02_OpenSDA_FRDM-K64F.bin , which was downloaded from https://www.segger.com/downloads/jlink/#JLinkOpenSDABoardSpecificFirmwares  and pasted in the bootloader disk and now the flashinfo.txt says 

This J-Link VMSD config can be used to flash a NXP MK64FN1M0xxx12 target device.

however, I get the same error when trying to upload the code :-(

Programming Done.
Contents mismatch at: 0000001CH (Flash=00H Required=96H) !
Contents mismatch at: 0000001DH (Flash=00H Required=E6H) !
Contents mismatch at: 0000001EH (Flash=00H Required=FCH) !
Contents mismatch at: 0000001FH (Flash=00H Required=DFH) !
Verify Failed!
Error: Flash Download failed - "Cortex-M4"
Flash Load finished at 00:26:44

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NXP TechSupport
NXP TechSupport

Hi Marcos Faundez Zanuy,

   1. Please use the SDK_FRDM-K64 code is downloaded from this link:

Welcome | MCUXpresso SDK Builder 

Select development board, choose the board as FRDM-K64, then open the SDK folder:

SDK_2.5.0_FRDM-K64F\boards\frdmk64f\demo_apps\led_blinky\mdk

Test led_blinky project.

  You also can check Getting Started with MCUXpresso SDK.pdf under:SDK_2.5.0_FRDM-K64F\docs

  2. You can also try the CMSIS DAP debugger

   OpenSDA Serial and Debug Adapter | NXP 

  Please help you to check what's the PC system you are using? If you are using the win10, you may also need to use the external debugger to update your FRDM-K64 onboard K20 bootloader firmware.

  More details, please check the above opensda link.

  I find your test project seems not from the SDK directly, so please download the newest SDK project, check your PC system, and the opensda, also test the CMSIS DAP debugger firmware.

Any updated information, please let me know.

Have a great day,
Kerry

 

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Contributor II

hi,

I modified the Port configuration and it tries  to load the code

targetsetup.jpg

but it fails during verification

keil5b.jpg

JLink info:
------------
DLL: V6.10i, compiled Oct 25 2016 19:31:51
Firmware: J-Link OpenSDA 2 compiled Oct 13 2015 12:10:27
Hardware: V1.00
S/N : 621000000

* JLink Info: Found SWD-DP with ID 0x2BA01477
* JLink Info: Found SWD-DP with ID 0x2BA01477
* JLink Info: AP-IDR: 0x24770011, Type: AHB-AP
* JLink Info: Found Cortex-M4 r0p1, Little endian.
* JLink Info: FPUnit: 6 code (BP) slots and 2 literal slots
* JLink Info: CoreSight components:
* JLink Info: ROMTbl 0 @ E00FF000
* JLink Info: ROMTbl 0 [0]: FFF0F000, CID: B105E00D, PID: 000BB00C SCS
* JLink Info: ROMTbl 0 [1]: FFF02000, CID: B105E00D, PID: 003BB002 DWT
* JLink Info: ROMTbl 0 [2]: FFF03000, CID: B105E00D, PID: 002BB003 FPB
* JLink Info: ROMTbl 0 [3]: FFF01000, CID: B105E00D, PID: 003BB001 ITM
* JLink Info: ROMTbl 0 [4]: FFF41000, CID: B105900D, PID: 000BB9A1 TPIU
* JLink Info: ROMTbl 0 [5]: FFF42000, CID: B105900D, PID: 000BB925 ETM
* JLink Info: ROMTbl 0 [6]: FFF43000, CID: B105900D, PID: 003BB907 ETB
* JLink Info: ROMTbl 0 [7]: FFF44000, CID: B105900D, PID: 001BB908 CSTF
ROMTableAddr = 0xE00FF000

Target info:
------------
Device: MK64FN1M0xxx12
VTarget = 3.300V
State of Pins:
TCK: 0, TDI: 0, TDO: 0, TMS: 0, TRES: 0, TRST: 1
Hardware-Breakpoints: 6
Software-Breakpoints: 8192
Watchpoints: 4
JTAG speed: 1429 kHz

Erase Done.
Programming Done.
Contents mismatch at: 0000001CH (Flash=00H Required=96H) !
Contents mismatch at: 0000001DH (Flash=00H Required=E6H) !
Contents mismatch at: 0000001EH (Flash=00H Required=FCH) !
Contents mismatch at: 0000001FH (Flash=00H Required=DFH) !
Verify Failed!
Error: Flash Download failed - "Cortex-M4"
Flash Load finished at 16:07:57

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NXP TechSupport
NXP TechSupport

Hi Marcos Faundez Zanuy,

  Click flashdownload item :

pastedImage_1.png

Do you add the flash download algorithm?

I still suggest you try the official SDK MDK project directly.

Wish it helps you!

Have a great day,
Kerry

 

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Contributor II

hi Kerry

I see this screen

flash_download.jpg

and yes, I'm using the example provided by NXP led_control_bm

in my jlink disk (the freescale board) there is a text file that says No valid VMSD configuration for target flashing found

but I don't know how to fix that (where should I get this file?) NXP example consists of more than 200 files just to play with leds and switches!!!

folders.jpg

regards

Marcos

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Contributor II

HI Mark

yes, I see this disk

disk.jpg

then I follow the web link, which brings to this page https://www.segger.com/products/debug-probes/j-link/models/j-link-ob/  where I check that the debugger is j-link.

then I set this debugger:

set_debugger.jpg

I accept the terms

terms.jpg

and I get this error

error.jpg

in the build line I can read

JLink info:
------------
DLL: V6.10i, compiled Oct 25 2016 19:31:51
Firmware: J-Link OpenSDA 2 compiled Oct 13 2015 12:10:27
Hardware: V1.00
S/N : 621000000

***JLink Error: Debugger tries to select target interface JTAG.
This interface is not supported by the connected emulator.
Selection will be ignored by the DLL.
Error: Flash Download failed - Target DLL has been cancelled
Flash Load finished at 23:29:23

but I don't know how to fix that. Note that I don't have any additional hardware for debugging. Just the freescale development kit. I'm trying to execute the suggested example available in NXP website

regards

Marcos

PD: in case it helps: I installed again the packs for K6x but I got the same result

comport.jpg

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Specialist V

Hi

pastedImage_1.png

It says why it doesn't work - you still need to configure the debugger in the Segger JLInk setup.

This is a general ergonomics nightmare in uVision: It has to in fact be set up twice in two locations....

Regards

Mark

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Contributor II

hi, many thanks, I Will try this  https://www.segger.com/products/debug-probes/j-link/technology/ides/keil-mdk/  this afternoon.

however, this is NOT a general keil problem. With Texas launchpad tiva is by far much more simple. It's a problem with this debugger.

regards

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Contributor II

if the doc is this one in cursive letters

Hardware requirements
=====================
- Mini USB cable
- FRDM-K64F board
- Personal Computer

Board settings
==============
This example project does not call for any special hardware configurations.
Although not required, the recommendation is to leave the development board's jumper settings
and configurations in default state when running this example.

Prepare the Demo
================
1. Connect a USB cable between the PC host and the Debug Link port on the board.
2. Download the program to the target board.
3. Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.

Running the demo
================
The log below shows the output of the led control demo in the terminal window:
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The demo is used to demonstrate how to use new components.
The main function of the demo is to control the led by using the shell or button.
For shell, please enter "help" to get the help information firstly. Turn on LED by using command "led on". And turn off LED by using command "led off".
For button, please press the button SW3 to control LED. Turn on LED when the button is pressed with long press or double click event. And turn off LED when the button is pressed with short press or one click event.

SHELL build: Aug 30 2018
Copyright 2018 NXP
led_control@SHELL>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

I still miss the configuration for debugging. Which option should I select?

keil5.jpg

In fact when I try to upload it says no debug unit device found 

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Specialist V

Hi

When you plug the FRDM-K64F into your PC it will show up as an external hard-drive and there you can see which debugger/loader is installed (it could be CMSIS-DAP, Jlink or PEMicro). Select this and then go into the debugger setting and set details, such as SWD mode.

You can get complete ready-to-build uVision projects for FRDM-K64F at the uTasker open source GIT hub link (USB, Ethernet, SD card, etc.)

Regards

Mark

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NXP TechSupport
NXP TechSupport

Hi Marcos Faundez Zanuy,

  About the K64 code, I highly recommend you use the official SDK code, that code already be tested, it contains the MDK project, please download the code from this link:

https://mcuxpresso.nxp.com/en/select 

  Select the board as FRDM-K64, then generate the code and download it.

  You will find the package already contains the doc and code folder, you can refer to the document in the doc at first to get start.

Wish it helps you!

Have a great day,
Kerry

 

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NXP TechSupport
NXP TechSupport

Hi Marcos Faundez Zanuy

  K64 register document is the reference manual:

https://www.nxp.com/webapp/Download?colCode=K64P144M120SF5RM 

Have a great day,
Kerry

 

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Contributor II

Hi,

I have found register addresses in the document you provided. Many thanks!

Now I'm trying to execute my first assembler code with this board based on a version I have for another board and I got some errors:

1. There are some compilation errors. However, the .axf is generated. I guess the error is in the .c files, which it is supposed that I'm not using. I guess for this reason they are not critical. Am I ok? how can I remove this .c and .h files from the target?

Rebuild started: Project: FRDMexample
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Rebuild target 'Target 1'
assembling FRDMexample.s...
assembling startup_MK64F12.s...
compiling system_MK64F12.c...
compiling startup.c...
C:\Users\faundez\AppData\Local\Arm\Packs\Keil\Kinetis_SDK_DFP\2.3.0\platform\devices\startup.c(68): warning:  #47-D: incompatible redefinition of macro "__VECTOR_TABLE"  (declared at line 126 of "C:\Users\faundez\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h")
      #define __VECTOR_TABLE Image$$VECTOR_ROM$$Base  
C:\Users\faundez\AppData\Local\Arm\Packs\Keil\Kinetis_SDK_DFP\2.3.0\platform\devices\startup.c: 1 warning, 0 errors
linking...
.\Objects\FRDMexample.axf: Warning: L6914W: option ro-base ignored when using --scatter.
.\Objects\FRDMexample.axf: Warning: L6914W: option rw-base ignored when using --scatter.
.\Objects\FRDMexample.axf: Warning: L6340W: options first and last are ignored for link type of scattered
./RTE/Device/MK64FN1M0VLL12/MK64FN1M0xxx12_flash.scf(90): warning: L6314W: No section matches pattern *(InRoot$$Sections).
Program Size: Code=380 RO-data=1040 RW-data=0 ZI-data=2048  
Finished: 0 information, 4 warning and 0 error messages.
".\Objects\FRDMexample.axf" - 0 Error(s), 5 Warning(s).
Build Time Elapsed:  00:00:06
Load "C:\\Keil\\ejemplo\\Objects\\FRDMexample.axf" 
Internal DLL Error
Error: Flash Download failed  -  Target DLL has been cancelled
Flash Load finished at 00:14:40

2. When I try to load the code in the FRDMK64 board I got the following error: no ulink2/ME device. I think this is because I have not setup the proper debug. According to Keil it seems that this board uses JTAG/SW (MDK5 - NXP FRDM-K64F  ). However, I do not see this option available in keil 5.29. How should I fix that? Please, consider that this is my first time trying to work with this development board. My previous experience is with launchpad TIVA TM4C123 mainly in C

FRDM.png

This is my assembler code, based on a document "GPIO example in Kinetis design studio (KDS) with FRDM-K64F" by Paul Garate & Augusto Panecatl

thanks in advance

; Assembler example
; SW2 press -> green color
; SW3 press -> blue color
; SW2 and SW3 pressed -> red color
SIM_SCGC5 EQU 0x40048038 ;clock activation

PORTB_PCR21 EQU 0x4004A054;Blue led
PORTB_PCR22 EQU 0x4004A058;Red led
PORTE_PCR26 EQU 0x4004D068;Green led
PORTC_PCR6 EQU 0x4004B018; switch 2
PORTA_PCR4 EQU 0x40049010; swith 3
 
GPIOA_PDDR EQU 0x400FF014; Port A Data Direction Register
GPIOB_PDDR EQU 0x400FF054; Port B Data Direction Register
GPIOC_PDDR EQU 0x400FF094; Port C Data Direction Register
GPIOE_PDDR EQU 0x400FF114; Port E Data Direction Register
 
GPIOC_PDIR EQU 0x400FF090; Port C Data Input Register
GPIOA_PDIR EQU 0x400FF010; Port A Data Input Register
GPIOB_PDOR EQU 0x400FF040; Port B Data Output Register
GPIOE_PDOR EQU 0x400FF100; Port E Data Output Register 
 
SEC_DIV_FIVE EQU 1066666 ; 1 second divided by 5
 
 AREA |.text|,CODE,READONLY, ALIGN=2
 THUMB
 
 EXPORT __main
 
__main
 BL GPIO_Init
Loop 
 LDR R0,=SEC_DIV_FIVE
 BL delay
 LDR R1,=GPIOC_PDIR
 LDR R0,[R1]
 CMP R0,#0x00 ;Switch 2 was pressed
 BEQ SWITCH2_ON
 LDR R1,=GPIOA_PDIR
 LDR R0,[R1]
 CMP R0,#0x00 ;Switch 3 was pressed
 BEQ SWITCH3_ON
 B Loop
 
SWITCH2_ON ;turn on green
 MOV R0,#0x04000000
 LDR R1,=GPIOE_PDOR
 STR R0,[R1]
 B Loop
 
SWITCH3_ON ;turn on blue
 MOV R0,#0x00400000
 LDR R1,=GPIOB_PDOR
 STR R0,[R1]
 B Loop
BOTH_SWITCHES ;turn on red
 MOV R0,#0x00200000
 LDR R1,=GPIOB_PDOR
 STR R0,[R1]
 B Loop
 
delay
 SUBS R0,R0,#1
 BNE delay
 BX LR
GPIO_Init
  LDR R1,=SIM_SCGC5
  LDR R0,[R1]
  ORR R0,R0,#0x2700 ;Port A, B, C, E
  STR R0,[R1]
  LDR R1,=PORTB_PCR21
  MOV R0,#0x100
  STR R0,[R1]
 
  LDR R1,=PORTB_PCR22
  MOV R0,#0x100
  STR R0,[R1]
 
  LDR R1,=PORTE_PCR26
  MOV R0,#0x100
  STR R0,[R1]
 
  LDR R1,=PORTC_PCR6
  MOV R0,#0x100
  STR R0,[R1]
 
  LDR R1,=PORTA_PCR4
  MOV R0,#0x100
  STR R0,[R1]
 
  LDR R1,=GPIOA_PDDR
  MOV R0,#0x0010
  STR R0,[R1]
 
  LDR R1,=GPIOB_PDDR
  MOV R0,#0x00600000
  STR R0,[R1]
 
  LDR R1,=GPIOC_PDDR
  MOV R0,#0x00000040
  STR R0,[R1]
 
  LDR R1,=GPIOE_PDDR
  MOV R0,#0x04000000
  STR R0,[R1]
 
  BX LR
 
 
  ALIGN
  END
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Specialist V

Hi

Registers are described in the users manual: Arm® Cortex®-M4|Kinetis® K64 120 MHz 32-bit MCUs | NXP 

Regards

Mark

Complete Kinetis solutions for faster/more efficient professional needs, training and support: http://www.utasker.com/kinetis.html
i.MX RT project compatibility: http://www.utasker.com/iMX.html
Including FreeRTOS integration for all Kinetis parts

Kinetis K64:
- http://www.utasker.com/kinetis/FRDM-K64F.html
- http://www.utasker.com/kinetis/TWR-K64F120M.html
- http://www.utasker.com/kinetis/TEENSY_3.5.html
- http://www.utasker.com/kinetis/Hexiwear-K64F.html


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https://community.nxp.com/thread/512558
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