cmsis_dspi_edma_transfer CS is pulled up during each byte

[kevinyuthermo]

Hi all,

I compile and run the cmsis_dspi_edma_transfer example with my NXP MK64FN1M0VLQ12.

One issue is found that CS becomes high after sending each bytes of data over SPI.

While using other examples, such as edma_b2b_transfer, or dspi_interrupt, everything works fine.

No clue about where and why the CS was pulled up during each bytes.

Thanks

Kevin

[kevinyuthermo]

This chip select pin issue was fixed by implementing our own DSPI_EdmaTransfer function.

Wish fsl spi edma driver can use default configure in the future, so that user can pass down the flags we want.

[kevinyuthermo]

In fsl_dspi_cmsis.c, the CS works as expected if I append PcsContinous as below:

static int32_t DSPI_EdmaTransfer(const void *data_out, void *data_in, uint32_t num, cmsis_dspi_edma_driver_state_t *dspi)
{
....
      xfer.configFlags = kDSPI_MasterCtar0 | RTE_SPI0_MASTER_PCS_PIN_SEL | kDSPI_MasterPcsContinuous;
...
}

But this solution needs to change standard FSL K64 SDK... , and to make my code work, I have to tell build engineer to change their SDK file also. Any better way to manager this?

This fsl_dspi_cmsis driver should allow application to pass the flags down to it for flexible control. 

Kevin

[jingpan]

Hi,

Yes, I think so. I feel that cmsis driver is not as common used as fsl driver. Most of peoples use fsl_driver. CMSIS driver is only used to show some standard or demo.

Regards,

Jing

[jingpan]

Hi Kevin,

There is a control bit SPIx_PUSHR.CONT selects  a continuous selection format. The bit enables the selected PCS signals to remain asserted between transfers. In cmsis_dspi_edma_transfer, it doesn't set this bit. If you want to keep PCS low during frames, you can set isPcsContinuous to 1.

Regards,

Jing