I have a strange problem with the MK10DX256VLH7. I use the program section command to program the flash:
| FTFL_FCCOB3 | 0x00 | |
| FTFL_FCCOB2 | 0x08 | |
| FTFL_FCCOB1 | 0x80 | |
| FTFL_FCCOB0 | 0x0b | |
| FTFL_FCCOB7 | 0x00 | |
| FTFL_FCCOB6 | 0x00 | |
| FTFL_FCCOB5 | 0x1b | |
| FTFL_FCCOB4 | 0x00 | |
| FTFL_FCCOBB | 0x00 | |
| FTFL_FCCOBA | 0x00 | |
| FTFL_FCCOB9 | 0x00 | |
| FTFL_FCCOB8 | 0x00 | |
and then use the following code to execute the flash command (code is located in flash block 0):
bool FlashInterface::isBusy() {
return ( FTFL_BASE_PTR->FSTAT & FTFL_FSTAT_CCIF_MASK) == 0;
}
static volatile int waitsAfterStart = 10;
void FlashInterface::clearErrorsAndStartCommand() {
FTFL_BASE_PTR->FSTAT = FTFL_FSTAT_CCIF_MASK | FTFL_FSTAT_RDCOLERR_MASK |
FTFL_FSTAT_FPVIOL_MASK | FTFL_FSTAT_ACCERR_MASK;
int waits = waitsAfterStart;
while( waits > 0 && isBusy()) {
waits--;
DelayCycles< 100>::delay();
}
}
When I run this, it causes a core lockup. I can catch it before the reset as a hard fault, which provides me with the reason "Bus fault on vector table read". SCB_SFSR tells me "instruction bus error". SCB_BFAR shows the bus fault address as 0xe000edf8, which is the debug core register DCRDR. When I look at the FSTAT register at the hard fault, I see that RDCOLERR is set.
So the flash controller stalls when reading from Program Flash, while Program Section updates a part of Data Flash. How can this be? According to the data sheet, Program Flash Reads are allowed simultaneously with Data Flash Program and Erase operations, and the Program LongWord as well as Erase Flash Block commands work without a problem in parallel to Program Flash Reads.
Is this a problem specific to this chip? If so, why is it not mentioned in the errata notes?
Or is this a design decision for the flash module? If so, why it is not described in the data sheet / reference manual?
I know the workaround is to start the operation from RAM, and also wait there for completion before returning. But I am very disappointed that this does not work, it would have made it much easier to update a block of flash while keeping the rest of the system fully responsive.