Hello nxf54944 thanks for your answer, I solved this problem some days ago, but now I don't use the overflow DMA request, I only use the the TPM channel request and my code is this.
#include <stdio.h>
#include "board.h"
#include "peripherals.h"
#include "pin_mux.h"
#include "clock_config.h"
#include "fsl_gpio.h"
#include "fsl_port.h"
#include "MKL46Z4.h"
#define LOGIC_LED_ON 0U
#define LOGIC_LED_OFF 1U
#ifndef BOARD_LED_RED_GPIO
#define BOARD_LED_RED_GPIO GPIOE
#endif
#ifndef BOARD_LED_RED_GPIO_PIN
#define BOARD_LED_RED_GPIO_PIN 29U
#endif
#define BOARD_TPM_CHANNEL 5U
#ifndef TPM_LED_ON_LEVEL
#define TPM_LED_ON_LEVEL kTPM_LowTrue
#endif
#define Cntr_Val 1000
uint16_t Val_Cn[16] =
{
Cntr_Val*0, Cntr_Val*1, Cntr_Val*2, Cntr_Val*3,
Cntr_Val*4, Cntr_Val*5, Cntr_Val*6, Cntr_Val*7,
Cntr_Val*8, Cntr_Val*9, Cntr_Val*10, Cntr_Val*11,
Cntr_Val*12, Cntr_Val*13, Cntr_Val*14, Cntr_Val*15
};
tpm_status_flags_t flag_t = 0;
dma_transfer_config_t TPM_CONF;
uint32_t flag_dma = 0;
uint32_t bytes_endless = 0;
void DMA_Callback(dma_handle_t * handle, void* param)
{
__asm volatile ("nop");
}
void DMA_1_DMA_CH_INT_DONE_0_IRQHANDLER()
{
__asm volatile ("nop");
flag_t = TPM_GetStatusFlags(TPM0);
TPM_ClearStatusFlags(TPM0, kTPM_TimeOverflowFlag | kTPM_Chnl5Flag);
flag_dma = DMA_GetChannelStatusFlags(DMA0, DMA_1_DMA_TPM_DMA_CHANNEL);
DMA_ClearChannelStatusFlags(DMA0, DMA_1_DMA_TPM_DMA_CHANNEL, flag_dma);
bytes_endless = DMA_GetRemainingBytes(DMA0, DMA_1_DMA_TPM_DMA_CHANNEL);
DMA_SetTransferConfig(DMA0, DMA_1_DMA_TPM_DMA_CHANNEL, &TPM_CONF);
}
void TPM_1_IRQHANDLER()
{
__asm volatile ("nop");
flag_t = TPM_GetStatusFlags(TPM0);
if( flag_t == (kTPM_TimeOverflowFlag | kTPM_Chnl5Flag) ){
GPIO_PortToggle(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN);
TPM_ClearStatusFlags(TPM0, kTPM_TimeOverflowFlag | kTPM_Chnl5Flag);
}
}
int main(void) {
BOARD_InitBootPins();
BOARD_InitBootClocks();
BOARD_InitBootPeripherals();
TPM0->SC |= TPM_SC_DMA(1);
TPM0->CONTROLS[5].CnSC |= TPM_CnSC_DMA(1);
dma_transfer_config_t transferConfig;
memset(&transferConfig, 0, sizeof(transferConfig));
transferConfig.srcAddr = (uint32_t)&Val_Cn[0];
transferConfig.destAddr = (uint32_t)&(TPM0->CONTROLS[5].CnV);
transferConfig.enableSrcIncrement = true;
transferConfig.enableDestIncrement = false;
transferConfig.srcSize = kDMA_Transfersize16bits;
transferConfig.destSize = kDMA_Transfersize16bits;
transferConfig.transferSize = sizeof(uint16_t) * 16;
TPM_CONF = transferConfig;
DMA_SetModulo(DMA0, DMA_1_DMA_TPM_DMA_CHANNEL, 32, 0);
DMA_SetTransferSize(DMA0, DMA_1_DMA_TPM_DMA_CHANNEL, 2);
DMA_SetTransferConfig(DMA0, DMA_1_DMA_TPM_DMA_CHANNEL, &transferConfig);
DMA_EnableChannelRequest(DMA0, DMA_1_DMA_TPM_DMA_CHANNEL);
DMA_EnableAsyncRequest(DMA0, DMA_1_DMA_TPM_DMA_CHANNEL, true);
DMA0->DMA[0].DCR |= DMA_DCR_D_REQ(0);
TPM_StartTimer(TPM0, kTPM_SystemClock);
printf("DMA working without CPU");
while(1) {
__asm volatile ("nop");
flag_dma = DMA_GetChannelStatusFlags(DMA0, DMA_1_DMA_TPM_DMA_CHANNEL);
flag_t = TPM_GetStatusFlags(TPM0);
bytes_endless = DMA_GetRemainingBytes(DMA0, DMA_1_DMA_TPM_DMA_CHANNEL);
if( flag_t == (kTPM_TimeOverflowFlag | kTPM_Chnl5Flag) ){
GPIO_PortToggle(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN);
TPM_ClearStatusFlags(TPM0, kTPM_TimeOverflowFlag | kTPM_Chnl5Flag);
}
}
return 0 ;
}
And I disabled this parameter on DMA config.

I could tell that a MCUXpresso's function disabled my configuration on the DMA Control Register, and the fuction is...
status_t DMA_SubmitTransfer(dma_handle_t *handle, const dma_transfer_config_t *config, uint32_t options)
{
assert(handle != NULL);
assert(config != NULL);
/* Check if DMA is busy */
if (handle->base->DMA[handle->channel].DSR_BCR & DMA_DSR_BCR_BSY_MASK)
{
return kStatus_DMA_Busy;
}
DMA_ResetChannel(handle->base, handle->channel); //This clean the Control Register and any configuration!!
DMA_SetTransferConfig(handle->base, handle->channel, config);
if (options & kDMA_EnableInterrupt)
{
DMA_EnableInterrupts(handle->base, handle->channel);
}
return kStatus_Success;
}
And I changed this function for this other.
void DMA_SetTransferConfig(DMA_Type *base, uint32_t channel, const dma_transfer_config_t *config)
{
assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
assert(config != NULL);
uint32_t tmpreg;
/* Set source address */
base->DMA[channel].SAR = config->srcAddr;
/* Set destination address */
base->DMA[channel].DAR = config->destAddr;
/* Set transfer bytes */
base->DMA[channel].DSR_BCR = DMA_DSR_BCR_BCR(config->transferSize);
/* Set DMA Control Register */
tmpreg = base->DMA[channel].DCR;
tmpreg &= ~(DMA_DCR_DSIZE_MASK | DMA_DCR_DINC_MASK | DMA_DCR_SSIZE_MASK | DMA_DCR_SINC_MASK);
tmpreg |= (DMA_DCR_DSIZE(config->destSize) | DMA_DCR_DINC(config->enableDestIncrement) |
DMA_DCR_SSIZE(config->srcSize) | DMA_DCR_SINC(config->enableSrcIncrement));
base->DMA[channel].DCR = tmpreg;
}
And now I achieved make I wanted, I hope that this help someone
Best regards