What is the state of PTF1 pin = disable after reset?

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What is the state of PTF1 pin = disable after reset?

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jun1
Contributor V

please tell me.

In the manual "Document Number: MKMxxZxxACxx5RM Rev. 1, 09/2014"

Referring to "10.2 Photon Signal Multiplexing and Pin Assignments"

No. 44 pin of 44 LGA type is disabled at DEFAULT.

I will use this as PTF 1, but here is the question.

① In the case of DEFAULT = disable after reset, what is the direction of input / output in what state?

② I think that it is not pulled up and pulled down, is it correct?

Looking at "11.5.1 Pin Control Register n (PORTx_PCRn)" in the manual

Pull Enable and Pull Select,

"Varies by port. See Signal Multiplexing and Signal Descriptions chapter for reset values per port."

Although it is written, I do not understand even if I look at the reference destination.

Thank you for your instruction.

#I am sorry that my English is not good.

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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi jun yamada,

Please check the description in Kinetis Peripheral Module Quick Reference and MKMXXZXXACXX5RM:

①DEFAULT = disable = high impedance

②not pulled up and pulled down

disabled (high impedance) state.png

pullup pulldown disable.png

Best Regards,

Robin

 

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366 Views
Robin_Shen
NXP TechSupport
NXP TechSupport

Hi jun yamada,

Please check the description in Kinetis Peripheral Module Quick Reference and MKMXXZXXACXX5RM:

①DEFAULT = disable = high impedance

②not pulled up and pulled down

disabled (high impedance) state.png

pullup pulldown disable.png

Best Regards,

Robin

 

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------