We have question regarding implementation of 3-phase power metering based on FFT metering libraries. We are deciding whether to use qt timer based U-I phase shift compensation or software based. 1. Looking at AN5007 section 6.2 there is a FFT sample proce

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We have question regarding implementation of 3-phase power metering based on FFT metering libraries. We are deciding whether to use qt timer based U-I phase shift compensation or software based. 1. Looking at AN5007 section 6.2 there is a FFT sample proce

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davidmalovrh
Contributor I

Question regarding implementation of 3-phase power metering based on FFT metering libraries, deciding whether to use qt timer based U-I phase shift compensation or software based.

  1. Looking at AN5007 section 6.2 there is a FFT sample process

    - how to trigger SD conversion (312us interval)?

    - is there additional delay needed between SD triggering for each phase as in Figure 5.?

  1. In case we use software based U-I phase shift compensation

    - how to fill phase-shift correction buffer for METERLIBFFT3PH_InitMainBuffPhX?

    - is it ok to calculate phase shift correction based on power factor during calibration
      process and use same value for each harmonic in buffer?

MarMi

ludek

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egoodii
Senior Contributor III

But you might also note that if you take, for instance, 32 samples per phase, that's 96 samples total, or one every 3.75 degrees.  120 degrees is indeed exactly a 32-sample delay.  So with these regularly-placed interleaved-samples of all three phases you get exact in-phase alignment of a binary-count of samples on each phase (convenient for FFTs of course!) --- if sample '0' is 0-degrees on phase A, sample 32 will be 0-degrees on phase B, and sample 64 will be 0 degrees on phase C.

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Ludek
NXP Employee
NXP Employee

All phases (ADC results) are absolutely independent in this case. You may imagine it as three 1-ph meters, in fact. You will get three independent binary buffers. For your 32-samples example it means, that you sample input periodic signal every 11.25 degree (360/32) on each phase:

  • sample '0' on phase 'A' = 0degree, sample '1' on phase 'A'= 11.25degree ...... sample '31' on phase 'A' = 348.75degree
  • sample '0' on phase 'B' = 0degree, sample '1' on phase 'B'= 11.25degree ...... sample '31' on phase 'B' = 348.75degree
  • sample '0' on phase 'C' = 0degree, sample '1' on phase 'C'= 11.25degree ..... sample '31' on phase 'C' = 348.75degree

sample '32' = sample '0' of the next period, etc., etc.

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Ludek
NXP Employee
NXP Employee
  • fs=fadc/OSR, for example: 6.144MHz/1024=6kHz => sampling interval is 166usec => for 50Hz main you get 120 samples
  • There should be an additional delay (FDL) for the 3-ph topology, according the FFT_KM3x.pdf document, page 20. This delay simulates the ADC-SAR conversion time (~9usec) due to not having all ADC results at one time - we have only one SAR and need three results.

   2.

  • METERLIBFFT3PH_InitMainBuffPhX function sets the pointer to the phase shift correction buffer [0.001°] and U/I pointers to the real and imaginary buffers - see the Chapter 5.11 in AN4255. See also simple application examples (meterlibfft3ph_test.c) in AN4255SW associated file how to use and fill these buffers.
  • Phase shift correction values can be calculated using power factor (or P, Q, S values) during the calibration process - the 1st harmonic only, other harmonics are not used (0) during the calibration. See also the 1-ph application example - DRM163 - there is applied this calibration process. You should only adopt it for your 3-ph application.
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