Watchdog Interrupt K24F Board Resets Before ISR

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Watchdog Interrupt K24F Board Resets Before ISR

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jasonphilippi
Contributor III

Hello,

I am using ksdk 1.3 with processor expert.

I can't reach a breakpoint on the Watchdog ISR.

As far as I can tell, the LPO clock is set to 1kHz as described in the reference manual.

const wdog_config_t watchdog1_InitConfig0 = {
 .wdogEnable = true,
 .clkSrc = kWdogLpoClkSrc,
 .prescaler = kWdogClkPrescalerDivide1,
 .workMode.kWdogEnableInWaitMode = true,
 .workMode.kWdogEnableInStopMode = true,
 .workMode.kWdogEnableInDebugMode = false,
 .updateEnable = true,
 .intEnable = true,
 .winEnable = false,
 .windowValue = 0U,
 .timeoutValue = 10000U,
};

I have tried configuring the interrupt at compile and at runtime, I can't seem to reach it.

I looked at WDOG_STCTRLL and I never saw bit 15 (INTFLG) rise. I put a breakpoint on the reset handler to see if the watchdog interrupt was ever raised.

What am I missing here?

Regards,

Jason

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1,077 次查看
IvanRuiz
NXP Employee
NXP Employee

Hello,

Please enable DBGEN in WDOG_STCTRLH register, that way you'll be able to reach the breakpoint on the Watchdog ISR.

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Best regards,

Ivan.

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jasonphilippi
Contributor III

Ivan,

That did not make a difference. I will keep it enabled though.

I feel like my watch dog is hitting that second reset quicker than I can get to the interrupt.

Even setting the priority of the interrupt to 0 (Maximal Cortex-M4) I don't seem to hit it.

LPO Clock 1kHz

Prescaler 1

Bus Clock 20.97 MHz

Should I try to slow down the LPO clock so I don't hit the second reset so quickly?

Best Regards,

Jason

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