Using ADC with PDB and DMA

[ViniciusHoff]

I need to implement a voltage meter, for this, I want use an ADC with DMA.

I would like to implement this using the modules: CMP->PDB->ADC->DMA. A CMP module synchronizes a PDB that trigger a ADC that call a DMA. However, I am not able to configure the modules.

I am using Processor Expert and the components:

AnalogComp_LDD - Generate a pulse each 16.6ms;

Init_PDB - Works in continuos mode with CMP0_output as trigger pin. It´s generated a Trigger A output each 250us.

Init_ADC - Triggered by Trigger A and with DMA request enabled.

Init_eDMA -  With just Channel 0 enabled and ADC0 as Channel Source. Data Source is ADC0_RA and Data Destination is a 128 bytes buffer.

What happens is that only some bytes are transfered to buffer and then nothing else is copied.

What I need configure for this works?

[ViniciusHoff]

Hi

I used the AN4688 - Sampling Audio with ADC on Kinetis  KwikStik as a template for configuring components, but, even with these settings, the uC continued transfering only some bytes.

I changed the settings:

- Minor Loop maping from Disable to Destination addres offset;

- Minor linking to Enable

So the DMA has transferred the number of blocks defined in Major Interation Count, but after that It did not transfer more anything.

How I restart the DMA?

[mjbcswitzerland]

Hi

Please see this: Application note on DMA driven ADC and DAC, using PDB as timebase

It doesn't use the CMP part but the rest may be equivalent. You can also load the binary to your board to check basic operation.

Regards

Mark

[ViniciusHoff]

Thank you Mark Butcher.

I read this document and I understood the steps to configure the uC.

However, my problem is how to setup the DMA, I think that the ADC, PDB and CMP are set certain.

I don´t know how to set the DMA to run continuously.

[mjbcswitzerland · Accepted solution]

Hi

For continuous DMA don't set the DREQ bit in DMA_TCD_CSR.

In addition, if using a buffer to save the sample to, you will want to allow this to wrap-around by setting

DMA_TCD_DLASTSGA to  MINUS size of the buffer

Regards

Mark

[ViniciusHoff]

Thank you Mark Butcher!

Now, the uC works correctly!

Besides clear the DREQ bit, I fixed another problem with the PDB. The PDB was generating an error in PDB0_CH0S. I fixed this by initializing the PDB after the ADC and cleaning the flag error, writing 0s in PDB0_CH0S rather than 1s (how to be in datasheet and CodeWarrior).

[michelebacchere]

Hi Vinicius,

I have the same your problems : PDB0_CH0S has 0x00010001 value ....

I have init PDB after ADC and try to set to 0 this error values but in my app it gives to me always error.

I am using TWR-K70.

Have you got ahy suggestions?

Thanks

Michele

[ViniciusHoff]

Hi Michele,

Do you use the DMA_TCDx_SLAST and DMA_TCDx_DLASTSGA registers?

If you use the DMA with a major loop, the DMA_TCDx_SLAST and DMA_TCDx_DLASTSGA may need to be negatives.

[michelebacchere]

Hi Vinicius,

I set in Processor expert "Major interation count" = 40 ... and I see that PE set DMA_TCDx_SLAST and  DMA_TCDx_DLASTSGA to 0x00.

And the "Minor loop maping" is Disable.

I am following AN4688 .

http://cache.freescale.com/files/32bit/doc/app_note/AN4688.pdf

[ViniciusHoff]

What's the Input Trigger Select of the PDB?

The trigger period is not shorter than the PDB period?

[michelebacchere]

The input trigger selected is th PDB_SWTRIG;

so in my main I do :

// Initialize ADC

         ADC1_Init();

         // Initialize DMA

         eDMA1_Init();

         // Initialize PDB for triggering

         PDB1_Init();

         PDB0_SC = (PDB0_SC | PDB_SC_SWTRIG_MASK);

but then I have the problem that I describe to you.

[michelebacchere]

I don't use Major loop.

[ViniciusHoff]

It seems to be right.

What is the value of the PDB0_CH0S before you set PDB0_SC?

You can try change Trigger Delay A value to Modulus value.

[michelebacchere]

Hi Vinicius,

before setting the PDB0_SC the value of PDB0_CH0S is 0x00000000.

thanks

[michelebacchere]

Maybe it is the ADC that doesn't receive the PDB request of sampling?

[ViniciusHoff]

Actually, this error means that the ADC received a PDB request before finishing a sampling. It seems like the PDB is sending requests faster that the sampling time of the ADC.

Look the Counter Frequency of the PDB. This parameter have to be greater that the Conversion Time of the ADC.

[michelebacchere]

Hi Vinicius,

I set PDB counter period 1000us and the ADC conversion TIME 4.08+3.33us = 7.41us.

So I think this is ok.

Or not?

[ViniciusHoff]

It looks ok.

You can try depurate using interrupts and  setting output pins when triggering the PDB and/or the ADC.