Unable to generate PWM after FTM FaultF clear

[sangameshvandal]

Hi

Unable to generate PWM after the Fault, even if the the corresponding FaultF bit is cleared. The fault control mode is configured in Manual.

The system needs to be turned off and turned on to generate next PWM.

Is there anything else need to be done to generate PWM after fault is generated, when fault control is in manual mode.

[enricocongiu]

I had same issue.

try to set reload point bit (min or max) to 1 : CNTMIN or CNTMAX on SYNC reg.

[kerryzhou]

2.3.3 Fault Status and Interrupt Control
The fault event can generate an interrupt if enabled by the FAULTIE bit in the FTMxMODE register. The
fault event is indicated by the FAULTF bit in the FTMxFMS register. To clear the FAULTF bit:
1. While the FAULTF bit is set, read the FTMxFMS register.
2. Test the FAULTIN bit in the FTMxFMS register.
NOTE
Clearing bit FAULTF re-enables FTM outputs under all conditions, because
the fault input is edge-sensitive only. Therefore, before clearing the
FAULTF bit, the actual state of the fault input pin must be checked by
testing the FAULTIN bit in the FTMxFMS register.
3. Write a logic 0 to the FAULTF bit.

[sangameshvandal]

Hi Kerry Zhou,

Thanks for the reply, 

Still unable to generate PWM without reset, refer below the steps followed.

FTM[0] is pointer to address 4003_8000, following is the sequence of operation for monitoring the error status. Clearing the FAULTF if if there is a fault 

FTMx_FMS_T fms;

fms.U32 = FTM[0]->FMS.U32;

if (fms.F.FAULTF0 == 0)
{
  //NORMAL;
}
else
{
   FTM[0]->FMS.F.FAULTF = 0 // tried individual bit clearing for FAULTF0
}

[kerryzhou]

Hi Sangamesh Vandal,

    This the code from the KSDK, you can find the FAULT clear code:

void FTM_ClearStatusFlags(FTM_Type *base, uint32_t mask)
{
    /* Clear the timer overflow flag by writing a 0 to the bit while it is set */
    if (mask & kFTM_TimeOverflowFlag)
    {
        base->SC &= ~FTM_SC_TOF_MASK;
    }
    /* Clear fault flag by writing a 0 to the bit while it is set */
    if (mask & kFTM_FaultFlag)
    {
        base->FMS &= ~FTM_FMS_FAULTF_MASK;
    }
    /* Clear channel trigger flag */
    if (mask & kFTM_ChnlTriggerFlag)
    {
        base->EXTTRIG &= ~FTM_EXTTRIG_TRIGF_MASK;
    }

#if defined(FSL_FEATURE_FTM_HAS_RELOAD_INTERRUPT) && (FSL_FEATURE_FTM_HAS_RELOAD_INTERRUPT)
    /* Check reload flag by writing a 0 to the bit while it is set */
    if (mask & kFTM_ReloadFlag)
    {
        base->SC &= ~FTM_SC_RF_MASK;
    }
#endif
    /* Clear the channel status flags by writing a 0 to the bit */
    base->STATUS &= ~(mask & 0xFFU);
}

Please take care, when you clear the fault, you should make sure there has no other fault condition is detected, otherwise, the FAULTF remains set.

You can debug your code, after the fault happens, then remove the fault condition, and clear the FAULTF flag, and check the flag again, whether it is successfully cleared.

If you still have question, please give me some picture about your debug register.

Have a great day,
Kerry

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[sangameshvandal]

Hi Kerry Zhou

Thanks for the sample code, does this mean, we need to clear all these flags(timer overflow flag, external trigger flag etc....)on fault or only the 

/* Clear fault flag by writing a 0 to the bit while it is set */
    if (mask & kFTM_FaultFlag)
    {
        base->FMS &= ~FTM_FMS_FAULTF_MASK;
    }

And also can you please share the link to download this complete code base

Thank you

[kerryzhou]

Hi Sangamesh Vandal,

   Please download the code from this link:

Welcome to MCUXpresso | MCUXpresso Config Tools 

  Choose TWR-KV31F120M, then build an SDK, generate it and download it.

 You can find the according code in folder:

SDK_2.0_TWR-KV31F120M\devices\MKV31F51212\drivers

fsl_ftm.c

Wish it helps you!

Have a great day,
Kerry

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[sangameshvandal]

Hi

Now the issue is fixed, even though the fault was cleared, needed to reset FTM[0]->CNT.F.COUNT to 0 to start the next PWM signals.

Thanks for the support

[kerryzhou]

Hi Sangamesh Vandal,

   Please tell me the chip part number which you are using.

Waiting for your reply!

Have a great day,
Kerry

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[sangameshvandal]

Hi,

I hope, by chip part number you meant microcontroller part number

[kerryzhou]

Hi Sangamesh,

   Yes, I have got it.

  I am testing it on my side now, and will reply you later.

  On your side,  please also check the fault flag after you clear it, did you clear it successfully or there has any other fault happen again?

Have a great day,
Kerry

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[sangameshvandal]

MKV31F512VLL12 is the chip part number

[kerryzhou]

Hi Sangamesh Vandal,

According to the reference manual, and AN3729, there has 2 Fault clearing in FTM module:

2.3.2.1 Automatic Fault Clearing
If automatic fault clearing is selected (FAULTM[1:0] = 11), then the disabled channel outputs are
re-enabled at the beginning of each PWM pulse, and the fault input signal returns to zero. This setting is
usually used for implementing cycle-by-cycle current limitation.
2.3.2.2 Manual Fault Clearing
If manual fault clearing is selected (FAULTM[1:0] = 01 or 10), then disabled channel outputs are enabled
when the FAULTF bit is cleared and a new PWM cycle begins. This mode is used for fault protection.
Because the fault input is edge-sensitive only, the actual state of the fault input pin must be checked by
testing the FAULTIN bit in the FTMxFMS register before clearing the FAULTF bit.

Which modes you are using?  Manual Fault clearing? When you clear the bit, did you also check the FAULTIN bit?

Wish it helps you!

Have a great day,
Kerry

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