UART1 dont work with a baud rate of 115200 KM33ZA128

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UART1 dont work with a baud rate of 115200 KM33ZA128

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andresbaena
Contributor II

Hello everyone, 

I have a Kinetis MKM33ZA128  and I'm trying to configure the UART1 module for a baud rate of 115200. I tryed several clock rates but my host receive only garbage. Every other baud rates until 19200works fine.  Here is my source code:

#include "drivers/drivers.h"

void main (void)

{

  char c;

  SIM_Init  (SIM_MODULE_ALL_PERIPH_ON_CONFIG);

  /* route core clock to PTF7                                                 */

  SIM_SelClkout (CLKOUT_SRC1);

  PORT_Init (PORTF,PORT_MODULE_ALT3_MODE,PIN7);

  /* clock mode 1:1:1, 24MHz                                                  */

  SIM_SetClkMode (SYSCLK_MODE0);

  SIM_SetClkDiv  (SYSCLK_DIV1);

  FLL_Init  (FLL_MODULE_FEE_24MHZ_CONFIG );

  /* UART1 init 9600bd                                                        */

  PORT_Init (PORTI, PORT_MODULE_ALT2_MODE, PIN0|PIN1);

  UART_Init (UART1, UART_MODULE_POLLMODE_CONFIG(19200,24e6));

  UART_PutStr (UART1,"\n\rCharacters will be echoed on the screen:\n");

  while(1)

  {

    /* read and echo character                                                */

    while (!UART_RxFull(UART1));

    c = UART_GetChar (UART1);

    while (!UART_TxIdle(UART1));

    UART_PutChar (UART1,c);

  }

}

#define FLL_MODULE_FEE_24MHZ_CONFIG                                           \

(tFLL){                                                                       \

/* C1 */ SET(MCG_C1_CLKS(0x00))|SET(MCG_C1_FRDIV(0x00))|                      \

/* .. */ CLR(MCG_C1_IREFS_MASK)|CLR(MCG_C1_IRCLKEN_MASK)|                     \

/* .. */ CLR(MCG_C1_IREFSTEN_MASK),                                           \

/* C2 */ SET(MCG_C2_LOCRE0_MASK)|SET(MCG_C2_RANGE0(0x00))|CLR(MCG_C2_HGO0_MASK)|\

/* .. */ CLR(MCG_C2_EREFS0_MASK)|CLR(MCG_C2_LP_MASK)|CLR(MCG_C2_IRCS_MASK),   \

/* C4 */ SET(MCG_C4_DMX32_MASK)|SET(MCG_C4_DRST_DRS(0x00)),                   \

/* C6 */ CLR(MCG_C6_LOLIE0_MASK)|CLR(MCG_C6_PLLS_MASK)|CLR(MCG_C6_CME0_MASK)| \

/* .. */ SET(MCG_C6_CHGPMP_BIAS(0x08)),                                       \

/* SC */ CLR(MCG_SC_ATME_MASK)|CLR(MCG_SC_ATMS_MASK)|                         \

/* .. */ CLR(MCG_SC_FLTPRSRV_MASK)|SET(MCG_SC_FCRDIV(0x01)),                  \

/* C7 */ SET(MCG_C7_PLL32KREFSEL(0))|SET(MCG_C7_OSCSEL_MASK),                 \

/* C8 */ SET(MCG_C8_LOCRE1_MASK)|CLR(MCG_C8_LOLRE_MASK)|CLR(MCG_C8_CME1_MASK)|\

/* .. */ CLR(MCG_C8_COARSE_LOLIE_MASK),                                       \

}

#define UART_MODULE_POLLMODE_CONFIG(brate,clk)                                \

(tUART){                                                                      \

/* BDH */ CLR(UART_BDH_RXEDGIE_MASK)|((CALC_SBR(brate,clk)>>8)&0x1f),         \

/* BDL */ ((CALC_SBR(brate,clk)>>0)&0xff),                                    \

/* C1  */ CLR(UART_C1_LOOPS_MASK)|CLR(UART_C1_RSRC_MASK)|                     \

/* ... */ CLR(UART_C1_M_MASK)|CLR(UART_C1_WAKE_MASK)|                         \

/* ... */ CLR(UART_C1_ILT_MASK)|CLR(UART_C1_PE_MASK)|                         \

/* ... */ CLR(UART_C1_PT_MASK),                                               \

/* C2  */ CLR(UART_C2_TIE_MASK)|CLR(UART_C2_TCIE_MASK)|                       \

/* ... */ CLR(UART_C2_RIE_MASK)|CLR(UART_C2_ILIE_MASK)|                       \

/* ... */ SET(UART_C2_TE_MASK)|SET(UART_C2_RE_MASK)|                          \

/* ... */ CLR(UART_C2_RWU_MASK)|CLR(UART_C2_SBK_MASK),                        \

/* S2  */ CLR(UART_S2_RXEDGIF_MASK)|CLR(UART_S2_MSBF_MASK)|                   \

/* ... */ CLR(UART_S2_RXINV_MASK)|CLR(UART_S2_RWUID_MASK)|                    \

/* ... */ CLR(UART_S2_BRK13_MASK),                                            \

/* C3  */ CLR(UART_C3_T8_MASK)|CLR(UART_C3_TXDIR_MASK)|                       \

/* ... */ CLR(UART_C3_TXINV_MASK)|CLR(UART_C3_ORIE_MASK)|                     \

/* ... */ CLR(UART_C3_NEIE_MASK)|CLR(UART_C3_FEIE_MASK)|                      \

/* ... */ CLR(UART_C3_PEIE_MASK),                                             \

/* MA1 */ SET(UART_MA1_MA(0x00)),                                             \

/* MA2 */ SET(UART_MA2_MA(0x00)),                                             \

/* C4  */ CLR(UART_C4_MAEN1_MASK)|CLR(UART_C4_MAEN2_MASK)|                    \

/* ... */ CLR(UART_C4_M10_MASK)|((CALC_BRFA(brate,clk)>>0)&0x1f),             \

/* C5  */ CLR(UART_C5_TDMAS_MASK)|CLR(UART_C5_RDMAS_MASK)                     \

}

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isaacavila
NXP Employee
NXP Employee

Hello Andres,

Your software isn't the problem, I've tested it in my TWR-KM34Z50MV3 and it worked well, here is my terminal output:

output terminal.jpg

Have you tried using other terminals?

Best Regards,

Isaac

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isaacavila
NXP Employee
NXP Employee

Hello Andres,

I've tested your basic project into TWR-KM34Z50MV3 board and it worked well for baud rates higher than 19200 (38400 and 115200).

Remember that UART1 is clocked from Core clock and based on this value, you should calculate SBR and BRFD, so, I thought your core clock could not be set to 24MHz as it should be (you can measure the frequency on PTF7).

I hope this can help you!

Best Regards,

Isaac

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andresbaena
Contributor II

buenas tarde

efectivamente medi la frecuencia de core por el PTF7 y es 24Mhz, entonces no se porque no me funciona el uart para velocidades altas, puesto que para inferiores a 11200 anda a la perfeccion.

gracias andres

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isaacavila
NXP Employee
NXP Employee

Hello Andres,

are you using your own board or TWR solution?

I would recommend you to debug your project and see UART1's registers, they should look like:

UART1 registers.jpg

I hope this can help,

Best Regards,

Isaac

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andresbaena
Contributor II

buenas tardes

yo estoy utilizando la Board, pero ese ejemplo es para que velocidad.

slds andres

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isaacavila
NXP Employee
NXP Employee

Hello Andres,

The screenshot was taken after using TWR-KM34Z50MV3 and setting UART1 to 115200:

    FLL_Init  (FLL_MODULE_FEE_24MHZ_CONFIG );     /* UART1 init 115200*/     PORT_Init (PORTI, PORT_MODULE_ALT2_MODE, PIN0|PIN1);     UART_Init (UART1, UART_MODULE_POLLMODE_CONFIG(115200,24e6));     UART_PutStr (UART1,"\n\rCharacters will be echoed on the screen:\n\r");

Regards,

Isaac

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andresbaena
Contributor II

buenas tardes

este es el codigo que estoy usando :

#include "drivers/drivers.h"

void main (void)

{

  SIM_Init  (SIM_MODULE_ALL_PERIPH_ON_CONFIG);

  /* route core clock to PTF7                                                 */

  SIM_SelClkout (CLKOUT_SRC2);

  PORT_Init (PORTF,PORT_MODULE_ALT3_MODE,PIN7);

  /* clock mode 1:1:1, 24MHz                                                  */

  FLL_Init  (FLL_MODULE_FEE_24MHZ_CONFIG ); 

  /* UART1 init 115200*/ 

  PORT_Init (PORTI, PORT_MODULE_ALT2_MODE, PIN0|PIN1); 

  UART_Init (UART1, UART_MODULE_POLLMODE_CONFIG(115200,24e6)); 

  UART_PutStr (UART1,"\n\rCharacters will be echoed on the screen:\n\r"); 

    while(1);

}

y esto es lo que me recibe

[00][00][00][00][00][80][04][00][00][00][00][00][00][00][00][00][00]

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1,141 Views
isaacavila
NXP Employee
NXP Employee

Hello Andres,

Your software isn't the problem, I've tested it in my TWR-KM34Z50MV3 and it worked well, here is my terminal output:

output terminal.jpg

Have you tried using other terminals?

Best Regards,

Isaac

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